FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal


Go Back   FPGA Groups > NewsGroup > VHDL

VHDL comp.lang.vhdl newsgroup / Usenet

LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 07-11-2003, 03:29 PM
Amontec Team
Posts: n/a
Default XML for VHDL documention and structural description of Hardware SoC

Hi VHDL GNU men,

Amontec is interested to build an auto-documentation of our VHDL
libraries, cell-by-cell.

The documentation will stay basic, like :
general description
port description
generic description
implementation description
license description
note description

The goal is to do a interface documentation for the end-user.

Now, we know the power of XML for this kind of documentation.
The advantage of XML is the structural view like VHDL. Having a VHDL
library documented in a XML format, we will be able to describe the
hardware of a SoC very quickly, and to ask XML to re-generate a VHDL
concatenated file of our XML description ... oopps)

The start-point will becomes the end-point (VHDL bottom-up design to XML
up-down design)

I will be interested if some VHDL men have a VHDL to XML parser,
thinking documentation only.

Or is that better to do a parser to correct my VHDL libraries inserting
directly the XML format in the vhdl comment.

Let me know if some are interested to work with Amontec on this JOB.

Laurent Gauch
Amontec Team Manager

Reply With Quote


Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On

Similar Threads
Thread Thread Starter Forum Replies Last Post
How to start DMA from user_logic.vhdl (hardware side) [email protected] FPGA 0 06-26-2008 01:42 PM
Why doesnt XST RAM for this VHDL description Philipp FPGA 3 11-20-2007 06:13 PM
IEEE Standard Verilog® Hardware Description Language [LinuxFc4]GaLaKtIkUs™ Verilog 10 09-15-2005 04:39 PM
XML for VHDL documention and structural description of Hardware SoC Amontec Team FPGA 0 07-11-2003 03:29 PM

All times are GMT +1. The time now is 03:55 PM.

Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved