 |
FPGA CentralWorld's 1st FPGA Portal |
|
|
07-02-2004, 05:14 PM
|
|||
|
|||
VHDL Matched Filter
hello,
I'm designing in VHDL a digital matched filter for DSSS transmission.... The problem is that there's a lot of undesirable pulses beetween the autocorrelation pulses... I uses Barker and m sequences... Is there anyone who have already designed this kind of filter ? Thanks 
|
|
07-06-2004, 11:07 AM
|
|||
|
|||
|
Re: VHDL Matched Filter
Hi
> I'm designing in VHDL a digital matched filter for DSSS > transmission.... > > The problem is that there's a lot of undesirable pulses beetween the > autocorrelation pulses... How about rest of stream, is it scrambled? Try another Barker's code word. Jerzy Gbur
|
 |
| Bookmarks |
Linear Mode
|
|
Similar Threads
|
||||
| Thread | Thread Starter | Forum | Replies | Last Post |
| Help! FIR Filter - MATLAB fdatool - VHDL | Emel | FPGA | 3 | 01-09-2006 01:08 PM |
| Matched Filter | [email protected] | FPGA | 0 | 09-15-2005 06:24 AM |
| Farrow filter VHDL implementation? | Andrew Lohbihler | FPGA | 0 | 07-30-2005 04:41 AM |
| question about filter design vhdl | viswanath | FPGA | 1 | 05-18-2004 04:26 AM |
All times are GMT +1. The time now is 11:55 AM.
