FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > VHDL

VHDL comp.lang.vhdl newsgroup / Usenet

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 11-15-2006, 07:39 AM
priya
Guest
 
Posts: n/a
Default MODULUS operator

hi all
i m using integer data type in VHDL .i have to perform modulo
operation.
but the problem i m facing is that the operand must be a constant
like
A<= (A+1) MOD X
where X is not a constant.
during synthesis i m facing this problem
plz help out soon
one more thing
in case of for loop
for i in 0 to N loop
end loop
again N is sppsed to be fixed

best regards
priya

Reply With Quote
  #2 (permalink)  
Old 11-15-2006, 08:29 AM
Ved
Guest
 
Posts: n/a
Default Re: MODULUS operator

You can use Fixed package availabe at www.eda.org/fphdl , written by
David Bishop.
Its very easy to use and synthesise well with synplify-pro. I havn't
used it on ISE or QUARTUS.

Regards
Ved

priya wrote:
> hi all
> i m using integer data type in VHDL .i have to perform modulo
> operation.
> but the problem i m facing is that the operand must be a constant
> like
> A<= (A+1) MOD X
> where X is not a constant.
> during synthesis i m facing this problem
> plz help out soon
> one more thing
> in case of for loop
> for i in 0 to N loop
> end loop
> again N is sppsed to be fixed
>
> best regards
> priya


Reply With Quote
  #3 (permalink)  
Old 11-15-2006, 01:42 PM
Andy
Guest
 
Posts: n/a
Default Re: MODULUS operator

Modulo by a non-integer power of two is not supported by most synthesis
tools.

You could say:

if a + 1 > x then
a <= a + 1 - x;
else
a <= a + 1;
end if;

Which will synthesize for any value of x.

Andy

priya wrote:
> hi all
> i m using integer data type in VHDL .i have to perform modulo
> operation.
> but the problem i m facing is that the operand must be a constant
> like
> A<= (A+1) MOD X
> where X is not a constant.
> during synthesis i m facing this problem
> plz help out soon
> one more thing
> in case of for loop
> for i in 0 to N loop
> end loop
> again N is sppsed to be fixed
>
> best regards
> priya


Reply With Quote
  #4 (permalink)  
Old 11-16-2006, 03:54 AM
priya
Guest
 
Posts: n/a
Default Re: MODULUS operator

hi
i m using Xilinx ISE 7.01.04i
best regards
priya
Ved wrote:
> You can use Fixed package availabe at www.eda.org/fphdl , written by
> David Bishop.
> Its very easy to use and synthesise well with synplify-pro. I havn't
> used it on ISE or QUARTUS.
>
> Regards
> Ved
>
> priya wrote:
> > hi all
> > i m using integer data type in VHDL .i have to perform modulo
> > operation.
> > but the problem i m facing is that the operand must be a constant
> > like
> > A<= (A+1) MOD X
> > where X is not a constant.
> > during synthesis i m facing this problem
> > plz help out soon
> > one more thing
> > in case of for loop
> > for i in 0 to N loop
> > end loop
> > again N is sppsed to be fixed
> >
> > best regards
> > priya


Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
VHDL mod operator cbr_929rr VHDL 4 10-11-2006 08:36 PM
Implementing a two-modulus PLL divider in Altera Stratix II Markus Kuhn FPGA 5 02-20-2006 11:20 PM
Modulus 12 Andrés VHDL 4 02-14-2005 01:37 PM
direct calculation of the modulus ? mete FPGA 9 10-17-2004 11:43 AM
Shift operator Andreas VHDL 0 05-04-2004 04:50 PM


All times are GMT +1. The time now is 06:23 PM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved