FPGA Central

Hallo Everyone,

By the Post-PAR Simulation under NC-Sim, i need to compile the Xilinx
Library SIMPRIM, the Solution of Xilinx Homepage are here:

http://www.xilinx.com/xlnx/xil_ans_d...tPagePath=5474

but i do not want to use solution 2, because of others reasons, a
pre-compiled libraries are not possible.

And i do not want to use solution 1 too, because i want to do the
simulation with ncvlog+ncelab+ncsim step by step.

Now the problem is:
How can i do this

ncverilog -y $XILINX/verilog/src/simprims $XILINX/verilog/src/glbl.v
+libext+.v <testfixture>.v <design>.v

with ncvlog+ncelab+ncsim?? I know it must be in cds.lib, hdl.var and
so, but how?

Thanks!!!

Have you tried with compxlib command?
Just check
http://toolbox.xilinx.com/docsan/xil...sim0061_9.html

Regards,
Krishna Janumanchi


uvbaz wrote:
> Hallo Everyone,
>
> By the Post-PAR Simulation under NC-Sim, i need to compile the Xilinx
> Library SIMPRIM, the Solution of Xilinx Homepage are here:
>
> http://www.xilinx.com/xlnx/xil_ans_d...tPagePath=5474
>
> but i do not want to use solution 2, because of others reasons, a
> pre-compiled libraries are not possible.
>
> And i do not want to use solution 1 too, because i want to do the
> simulation with ncvlog+ncelab+ncsim step by step.
>
> Now the problem is:
> How can i do this
>
> ncverilog -y $XILINX/verilog/src/simprims $XILINX/verilog/src/glbl.v
> +libext+.v <testfixture>.v <design>.v
>
> with ncvlog+ncelab+ncsim?? I know it must be in cds.lib, hdl.var and
> so, but how?
>
> Thanks!!!

Thanks, Krishna

That works, but it is not my ......... anticipation

But does not matter, thanks again. :-)

Cheng

mysticlol schrieb:

> Have you tried with compxlib command?
> Just check
> http://toolbox.xilinx.com/docsan/xil...sim0061_9.html
>
> Regards,
> Krishna Janumanchi
>
>
> uvbaz wrote:
> > Hallo Everyone,
> >
> > By the Post-PAR Simulation under NC-Sim, i need to compile the Xilinx
> > Library SIMPRIM, the Solution of Xilinx Homepage are here:
> >
> > http://www.xilinx.com/xlnx/xil_ans_d...tPagePath=5474
> >
> > but i do not want to use solution 2, because of others reasons, a
> > pre-compiled libraries are not possible.
> >
> > And i do not want to use solution 1 too, because i want to do the
> > simulation with ncvlog+ncelab+ncsim step by step.
> >
> > Now the problem is:
> > How can i do this
> >
> > ncverilog -y $XILINX/verilog/src/simprims $XILINX/verilog/src/glbl.v
> > +libext+.v <testfixture>.v <design>.v
> >
> > with ncvlog+ncelab+ncsim?? I know it must be in cds.lib, hdl.var and
> > so, but how?
> >
> > Thanks!!!