FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > VHDL

VHDL comp.lang.vhdl newsgroup / Usenet

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 10-08-2003, 04:35 PM
MM
Guest
 
Posts: n/a
Default Flex model concept?

I am trying to understand the VHDL structure behind one of the Synopsys flex
models:
(http://www.synopsys.com/products/des...ee1394a_fx.pdf).
I don't have access to the model itself, only to this datasheet... There is
a VHDL testbench example in this datasheet that shows how the model is
instantiated. Can someone please explain how they did the command interface?
Are these commands (shown in red in the testbench example) VHDL procedures?
If they are how do they communicate to the model? I guess it happens somehow
through a handle, but how do you do it in VHDL? I am intrigued by this
concept...

Thanks,
/Mikhail



Reply With Quote
  #2 (permalink)  
Old 10-08-2003, 07:12 PM
Mike Treseler
Guest
 
Posts: n/a
Default Re: Flex model concept?

MM wrote:

> Are these commands (shown in red in the testbench example) VHDL procedures?


pg 50
http://www.synopsys.com/products/des...als/flexum.pdf

-- Mike Treseler

Reply With Quote
  #3 (permalink)  
Old 10-08-2003, 08:29 PM
MM
Guest
 
Posts: n/a
Default Re: Flex model concept?


"Mike Treseler" <[email protected]> wrote in message
news:[email protected]...
> MM wrote:
>
> > Are these commands (shown in red in the testbench example) VHDL

procedures?
>
> pg 50
>

http://www.synopsys.com/products/des...als/flexum.pdf
>


OK, I see. It seems that the thing is pretty complicated and involves much
more than just VHDL language, requires a simulator with SWIFT interface,
etc. Is the whole point of this to hide the model implementation in a binary
or are there other reasons? Assuming I wanted to do a functionally similar
thing, I guess I could simply add a command control port to the model entity
and have it controlled by external procedures the way I wanted. Is there a
downside to this approach compared to what Synopsys offers (besides hiding
the implementation)?

/Mikhail



Reply With Quote
  #4 (permalink)  
Old 10-08-2003, 08:37 PM
Mike Treseler
Guest
 
Posts: n/a
Default Re: Flex model concept?

MM wrote:
> etc. Is the whole point of this to hide the model implementation in a binary
> or are there other reasons?


That would be my guess.

> Assuming I wanted to do a functionally similar
> thing, I guess I could simply add a command control port to the model entity
> and have it controlled by external procedures the way I wanted.


Yes, keep it simple; have it your way.

> Is there a
> downside to this approach compared to what Synopsys offers (besides hiding
> the implementation)?


Unless you already own and must use this model,
there is no reason to study this odd interface.

-- Mike Treseler

Reply With Quote
  #5 (permalink)  
Old 10-08-2003, 09:20 PM
MM
Guest
 
Posts: n/a
Default Re: Flex model concept?

Thanks, Mike. I feel more confident now...

/Mikhail


Reply With Quote
Reply

Bookmarks


Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Xilinx FPGA - Behaviorial Model Transferred Instead of Place-and-routed Model Chloe FPGA 4 12-07-2005 07:15 AM
Altera FLEX 8000 Vincent Perron FPGA 4 02-05-2005 05:52 PM
Altera flex 10k library component doubt prav FPGA 4 04-18-2004 04:40 PM
FLEX 10K50E, which software support it? Jacques athow FPGA 2 12-22-2003 05:55 AM


All times are GMT +1. The time now is 12:05 PM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2024, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved