FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > VHDL

VHDL comp.lang.vhdl newsgroup / Usenet

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 08-20-2003, 11:30 AM
Arvind Kumar
Guest
 
Posts: n/a
Default E language mode for Emacs

Hi,
Does anyone know of lisp package for editing E-language in emacs.
Any help will be appreciated.
Regards,
Arvind Kumar
Reply With Quote
  #2 (permalink)  
Old 08-20-2003, 12:04 PM
Colin Marquardt
Guest
 
Posts: n/a
Default Re: E language mode for Emacs

[email protected] (Arvind Kumar) writes:

> Does anyone know of lisp package for editing E-language in emacs.
> Any help will be appreciated.


http://www.specman-mode.com/specman-mode.html

HTH,
Colin
Reply With Quote
  #3 (permalink)  
Old 08-20-2003, 01:08 PM
Stephen J. Turnbull
Guest
 
Posts: n/a
Default Re: E language mode for Emacs

>>>>> "Arvind" == Arvind Kumar <[email protected]> writes:

Arvind> Does anyone know of lisp package for editing E-language
Arvind> in emacs.

What is "E-language"? Maybe there's something similar, but we won't
know if we don't know what "E-language" is.

--
Institute of Policy and Planning Sciences http://turnbull.sk.tsukuba.ac.jp
University of Tsukuba Tennodai 1-1-1 Tsukuba 305-8573 JAPAN
Ask not how you can "do" free software business;
ask what your business can "do for" free software.
Reply With Quote
Reply

Bookmarks


Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
(x)emacs verilog-mode / slow indenting unfrostedpoptart Verilog 3 02-03-2008 04:02 AM
Tcl DC Mode for Emacs Reto Zimmermann Verilog 2 06-20-2006 12:39 PM
UCF-mode for Emacs [email protected] FPGA 2 04-27-2006 06:25 PM
System Verilog mode on Emacs! agape Verilog 1 12-03-2004 04:39 PM
Bug in AUTOSENSE with Emacs + Verilog Mode Srinivasan Venkataramanan Verilog 1 06-10-2004 01:44 PM


All times are GMT +1. The time now is 12:07 PM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2024, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved