FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > VHDL

VHDL comp.lang.vhdl newsgroup / Usenet

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 01-23-2004, 04:22 PM
Tony
Guest
 
Posts: n/a
Default compiler of language C to openrisc processor with VHDL

Hi,

Now I am doing some programming on Openrisc processor on FPGA. with
Xilinx tools set we can upload the makefile to it and run.

the problem is how can I complie the c file to makefile which I can
upload it to fpga and processor.

example, if we get hello.c. how to compile it to makefile.c?

Many Thanks,

it is great if you can also send me a email to notice me.
[email protected]
Reply With Quote
  #2 (permalink)  
Old 01-23-2004, 05:02 PM
Mike Treseler
Guest
 
Posts: n/a
Default Re: compiler of language C to openrisc processor with VHDL

Tony wrote:

> the problem is how can I complie the c file to makefile which I can
> upload it to fpga and processor.
>
> example, if we get hello.c. how to compile it to makefile.c?


Follow up to comp.lang.c or comp.arch.fpga.
In a unix environment
cc hello.c
will give you the executable file hello.o

A makefile is an optional text file to guide
complex compilations using "make".
The name is Makefile or makefile, not makefile.c

-- Mike Treseler
Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
VHDL language is out of date! Why? I will explain. [email protected] FPGA 42 12-15-2007 12:14 AM
how two sine signals are multiplied in VHDL language [email protected] FPGA 2 04-12-2007 04:41 PM
low budget SystemC to VHDL Compiler? Falk Salewski FPGA 0 04-21-2005 03:10 PM
VHDL language design question Neil Zanella VHDL 14 10-22-2003 08:29 PM
VHDL Standard Language Reference Manual Neil Zanella VHDL 1 07-08-2003 01:28 PM


All times are GMT +1. The time now is 06:41 PM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved