FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > VHDL

VHDL comp.lang.vhdl newsgroup / Usenet

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 10-10-2003, 05:25 AM
Amir
Guest
 
Posts: n/a
Default asynchronous design

Is there any good books on asynchronous design in VHDL?

Thank you.


Reply With Quote
  #2 (permalink)  
Old 10-10-2003, 06:01 AM
MM
Guest
 
Posts: n/a
Default Re: asynchronous design

Do you mean designing with multiple clocks? I don't think there are any
books written on just this topic, but some books have chaptes about crossing
clock domains. Also, several days ago in the "Should I worry about
metastability" thread on comp.arch.fpga Paul Leventis pointed to this great
paper on the subject:
http://www.sunburst-design.com/paper...Clk_rev1_1.pdf

/Mikhail

"Amir" <[email protected]> wrote in message
news:[email protected]
> Is there any good books on asynchronous design in VHDL?
>
> Thank you.
>
>



Reply With Quote
  #3 (permalink)  
Old 10-10-2003, 12:34 PM
Ansgar Bambynek
Guest
 
Posts: n/a
Default Re: asynchronous design

Google is your friend, searching for "asynchronous logic design" gives the
following result (of course more are shown), which could be used as a
starting point.

http://www.cs.man.ac.uk/async/

HTH.

Ansgar
--
Attention please, reply address is invalid, please remove "_xxx_" ro reply

"Amir" <[email protected]> schrieb im Newsbeitrag
news:[email protected]
> Is there any good books on asynchronous design in VHDL?
>
> Thank you.
>
>



Reply With Quote
  #4 (permalink)  
Old 10-10-2003, 03:10 PM
Amir
Guest
 
Posts: n/a
Default Re: asynchronous design

Thanks for your help.

-Amir
"Amir" <[email protected]> wrote in message
news:[email protected]
> Is there any good books on asynchronous design in VHDL?
>
> Thank you.
>
>



Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
HELP: a Funny asynchronous input design Aiken FPGA 10 06-14-2008 05:09 AM
asynchronous circuit design sanju FPGA 7 06-07-2007 01:07 PM
asynchronous FIFO design kelvins FPGA 3 04-10-2006 07:35 PM
Asynchronous FIFO design question [email protected] FPGA 12 03-08-2006 04:32 PM
Asynchronous design Chintan FPGA 6 11-20-2005 12:43 PM


All times are GMT +1. The time now is 11:23 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved