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  #1 (permalink)  
Old 08-23-2004, 12:16 PM
atts
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Default Verisity Specman Elite "e" language and Verification

All,

I've been looking for a suitable forum for asking
Verification questions specifically regarding Verisity's
"e" language.

Basically, I want to learn "e" , I've browsed Verisity's
web site looking for evaluation copies of their tools -
but no joy - does anyone know if they exist?

Does anyone know of any decent resources for learning "e"
and Verisity's tools.

thanks in advance,

atul.

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  #2 (permalink)  
Old 08-23-2004, 01:37 PM
Jonathan Bromley
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Default Re: Verisity Specman Elite "e" language and Verification

On Mon, 23 Aug 2004 12:16:36 +0100, atts <[email protected]> wrote:

>I've been looking for a suitable forum for asking
>Verification questions specifically regarding Verisity's
>"e" language.


Janick Bergeron's "Verification Guild" would be a good
place to start: http://verificationguild.com/
It covers many verification issues, but plenty of Specman
users and experts read its forum.

>Basically, I want to learn "e" , I've browsed Verisity's
>web site looking for evaluation copies of their tools -
>but no joy - does anyone know if they exist?


I don't believe so. Verisity have shrewdly applied much
of their marketing effort to really big customers. I'm
sure that if you are part of a global-scale chip company
that doesn't yet use Specman, you would have no difficulty
getting an eval licence just by asking :-)

>Does anyone know of any decent resources for learning "e"
>and Verisity's tools.


Courses:
* Verisity have their own;
* we offer a course - see http://www.doulos.com/fre.html
* I think Verifica have courses www.verifica.org
* there may be others

The nice thing about going on a course is that you get a
chance to play with the tools, in an environment where
there's someone around to help you. The bad news is
that courses cost money...

Books - Bergeron's well-known book on Writing Test Benches
now has some material on 'e', although I suspect it
assumes you know the basics of the language.

Other resources may be available - I make no claim
for completeness.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail:[email protected]
Fax: +44 (0)1425 471573 Web: http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
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  #3 (permalink)  
Old 08-25-2004, 03:00 PM
Larry Lapides
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Posts: n/a
Default Re: Verisity Specman Elite "e" language and Verification

For books on verification with Specman and e, try the following:

Design Verification with e by Samir Palnitkar
<http://www.amazon.com//exec/obidos/tg/detail/-/0131413090/qid=1092961635/sr=8-1/ref=sr_8_xs_ap_i1_xgl14/102-8949019-0163331?v=glance&s=books&n=507846>Design
Verification with e

Functional Verification Coverage Measurement and Analysis by Andrew Piziali
<http://www.amazon.com//exec/obidos/tg/detail/-/0131413090/qid=1092961635/sr=8-1/ref=sr_8_xs_ap_i1_xgl14/102-8949019-0163331?v=glance&s=books&n=507846>e
<http://www.wkap.nl/prod/b/1-4020-8025-5>Functional Verification
Coverage Measurement and Analysis

There is also a new book by Sasan Iman, but I don't have the title handy.

Larry



Jonathan Bromley wrote:

> On Mon, 23 Aug 2004 12:16:36 +0100, atts <[email protected]> wrote:
>
>
>>I've been looking for a suitable forum for asking
>>Verification questions specifically regarding Verisity's
>>"e" language.
>>

>
> Janick Bergeron's "Verification Guild" would be a good
> place to start: http://verificationguild.com/
> It covers many verification issues, but plenty of Specman
> users and experts read its forum.
>
>
>>Basically, I want to learn "e" , I've browsed Verisity's
>>web site looking for evaluation copies of their tools -
>>but no joy - does anyone know if they exist?
>>

>
> I don't believe so. Verisity have shrewdly applied much
> of their marketing effort to really big customers. I'm
> sure that if you are part of a global-scale chip company
> that doesn't yet use Specman, you would have no difficulty
> getting an eval licence just by asking :-)
>
>
>>Does anyone know of any decent resources for learning "e"
>>and Verisity's tools.
>>

>
> Courses:
> * Verisity have their own;
> * we offer a course - see http://www.doulos.com/fre.html
> * I think Verifica have courses www.verifica.org
> * there may be others
>
> The nice thing about going on a course is that you get a
> chance to play with the tools, in an environment where
> there's someone around to help you. The bad news is
> that courses cost money...
>
> Books - Bergeron's well-known book on Writing Test Benches
> now has some material on 'e', although I suspect it
> assumes you know the basics of the language.
>
> Other resources may be available - I make no claim
> for completeness.
>


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  #4 (permalink)  
Old 08-25-2004, 07:22 PM
Ajeetha Kumari
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Posts: n/a
Default Re: Verisity Specman Elite "e" language and Verification

Hi,

atts <[email protected]> wrote in message news:<[email protected]>...
> All,
>
> I've been looking for a suitable forum for asking
> Verification questions specifically regarding Verisity's
> "e" language.


There is a specman yahoogroups that was very active for some time,
but then Verisity kind of killed it by promoting their own
"verification vault", I am not very sure if they let non-customers
(consultants like me) access that.

You might still use [email protected] though. I believe Yahoo
Groups has some intermittent downtimes nowadays - not a good news (:-

>
> Basically, I want to learn "e" , I've browsed Verisity's
> web site looking for evaluation copies of their tools -
> but no joy - does anyone know if they exist?
>


Well, "E" is for big-buck guys - atleast that's my Humble
Observation/Opinion.

I would rather look forward to using VERA/JEDA/SV

> Does anyone know of any decent resources for learning "e"
> and Verisity's tools.
>


There are 2 book to my knowledge:

The e-Hardware Verification Language By Sasan Iman, Sunita Joshi
http://www.kap.nl/prod/b/1-4020-8023-9

and one by Samir Palnitkar.

Last piece of note: if in case you are working in India - Palnitkar's
book is available in Indian Edition ~ Rs. 300/-.

HTH,
Ajeetha
Independent ASIC DV Consuktant
Co-Author: Using PSL/SUGAR for Formal and Dynamic Verification 2nd
Edition
http://www.noveldv.com
> thanks in advance,
>
> atul.

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  #5 (permalink)  
Old 04-28-2005, 12:17 AM
Jon Nall
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Posts: n/a
Default Re: Verisity Specman Elite "e" language and Verification



On 2005-04-27 06:43:18 -0500, atts <[email protected]> said:
>
> Basically, I want to learn "e" , I've browsed Verisity's
> web site looking for evaluation copies of their tools -
> but no joy - does anyone know if they exist?


out of curiosity, why do you want to learn e?

nall.

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  #6 (permalink)  
Old 02-09-2012, 11:34 AM
Member
 
Join Date: Jul 2009
Posts: 44
Default

Please see a self study project that I did:
"
Based on a VHDL simple UART, I created a small verification eVC.
The DUT was first tested, using GHDL and the VHDL code and scripts can be taken from this location - UART DUT

This project consists of three main parts. Unit level check for the UART TX and RX. Then the DUT RX and TX are connected and tested. The later reuses both RX and TX eVC(s).
It is shown how to connect and configure the two separate eVC(s) in the full chip environment. ...
"
VHDL, verilog, design, verification, scripts, ...
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