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Old 06-26-2003, 04:54 PM
Uwe Bonnes
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Default Re: verilog equivalent to weak high in vhdl

srinivas turaga <[email protected]> wrote:
: Hi all,


: can any tell what could be its equivalent in verilog.
: i want to know what is exact verilog equivalent to weak high 'H' in vhdl.


: entity pullup is

: port (.........
: ..........
: x: out std_logic
: ............
: ...............

: begin

: ...........

: if y ='1' then
: x<='1'
: else
: x<='z';

: end if

: ...........................
: ........................


Try
wire x;
pullup(x);

or
tri1 x;

Hope this helps
--
Uwe Bonnes [email protected]

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
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