Hi Wando,
We (Verific) provide a Verilog-AMS parser, which is free in evaluation form
(a binary that reads AMS, and elaborates and writes out elaborated tree).
But you cannot do much with it unless you want to license the (C++) sources
and build your own EDA tool with it.
What do you want to do after you parse ?
Rob
"wanbo" <
[email protected]> wrote in message
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> Hi,
>
> Anybody knows if there is a free Verilog-A parser? I do check the faq, but
> there is only info about Verilog parser...
>
> Thanks,
> Bo
>
>