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Old 11-12-2006, 12:45 PM
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Default Power-on reset

Is there a dedicated power-on reset function in Verilog? What I want to
achieve is that my own reset functionality will be executed when the
FPGA (Xilinx Spartan3/400) undergoes power-on reset.

Maybe power-on reset is available as a Xilix core, but I haven't been
able to find anything like that.

I was hoping to avoid external POR circuitry.


Thanks,

Borge

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Old 12-12-2006, 11:57 AM
Andreas Ehliar
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Default Re: Power-on reset

On 2006-11-12, [email protected] <[email protected]> wrote:
> Is there a dedicated power-on reset function in Verilog? What I want to
> achieve is that my own reset functionality will be executed when the
> FPGA (Xilinx Spartan3/400) undergoes power-on reset.


If you target an FPGA you might be able to use an initial block to
define the values that flip flops should have on startup.
According to http://news.elektroda.net/initial-value-t127740.html XST
can handle it at least.

/Andreas
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