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Old 05-10-2006, 07:23 PM
anand
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Default Pointer in Verilog

This has been asked in an interview.
How does one declare and use a pointer variable in Verilog HDL?
Example would be helpful!

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Old 05-15-2006, 08:47 AM
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Default Re: Pointer in Verilog

I do not think this is ever possible with Verilog-2001, as it doesn't
have any pointer variable.

Joe
LogicSim - Your Personal Verilog Simulator
http://www.logicsim.com

anand wrote:
> This has been asked in an interview.
> How does one declare and use a pointer variable in Verilog HDL?
> Example would be helpful!


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Old 05-15-2006, 07:31 PM
Jeremy Ralph
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Default Re: Pointer in Verilog

Switch to VHDL and use an access type

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