As has already been pointed out, instead of passing the larger

parameter and trying to compute the smaller one with a log2, you can

pass the smaller parameter and compute the larger one from it with (1

<< N). Of course, this only works if the larger parameter is an exact

power of 2 (as it is in most cases, such as the size of a memory

addressable with a given number of address bits).

[email protected] wrote:

> parameter chaw = (number_channels <= 2) ? 1 :

> (number_channels <= 4) ? 2 :

> (number_channels <= 8) ? 3 :

> (number_channels <= 16) ? 4 :

> (number_channels <= 32) ? 5 :

> (number_channels <= 64) ? 6 : 7;
This approach works also. If you need this complex expression in

multiple places, you can define a parameterized log2 macro that expands

to the expression, and use that. This expression can be extended to

cover values up to 4 billion using 32 compares, which is somewhat bulky

but not unreasonable. This assumes that your tools support

parameterized macros (from Verilog-1995).

This can also be done with a Verilog-2001 constant function. But then

you have to write the log2 function correctly (I believe the one

published in the Verilog-2001 LRM was wrong), and include the

definition in any module where you want to use it.

The Verilog-2005 standard defines a $clog2 system function that

computes the log2 rounded up to the next highest integer, and which can

be used in constant expressions. However, you can't expect tools to be

supporting that yet.