FPGA Central

Hi Techies,
I have a question on Eye-diagram. We are having an interface between ADC and
Virtex-5 FPGA. this interface is High-Speed differential interface. Iam
simulating the interface with Hyper Lynx BoardSim. I want to know What are
the things i need to look up in the simulation so that i can say my layout
is fine?

I have generated an eye-diagram using HyperLynx but what exactly it will
tell. As far as my knowledge is concerned an eye-diagram can't tell us that
our impedance matching and our layout is correct. Correct me if iam wrong..

Can you just share me your thoughts on what to observe. Iam new to SI tool
and analysis so please help me in this. Iam also attaching my simulation
results with this mail. Please let me know how to add files as this group is
not allowing pictures to be shared.

Thanks & Regards
Srikanth Chundi



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Hi Srikanth,

unfortunately pictures and attachments are blocked by si-list. there are some file sharing sources available. Due to security issues, a lot of these are blocked by company firewalls. For pictures you might use: http://photobucket.com/

to your questions:
The eye diagram tells you if everything is OK (wide open eye) or if anything is wrong (closed eye) but it doesn't tell you exactly what went wrong, and where.
A closed eye can be caused by: loss, skew, reflections, x-talk. If your eye is violating the desired receiver eye mask, then you should focus on these parameters to find out what went wrong. I personally like s-parameters, but the time domain data is just as helpful. Most important is of corse to know the link budget of your interface (max losses, eye mask...).

hope this helps

BR
Gert


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-----Ursprüngliche Nachricht-----

Von: si-list-bounce (AT) freelists (DOT) org [mailto:si-list-bounce (AT) freelists (DOT) org] Im Auftrag von chundi srikanth
Gesendet: Freitag, 6. November 2009 13:43
An: si-list (AT) freelists (DOT) org
Betreff: [SI-LIST] Query on Eye-Diagram of RX ADC

Hi Techies,
I have a question on Eye-diagram. We are having an interface between ADC and
Virtex-5 FPGA. this interface is High-Speed differential interface. Iam simulating the interface with Hyper Lynx BoardSim. I want to know What are the things i need to look up in the simulation so that i can say my layout is fine?

I have generated an eye-diagram using HyperLynx but what exactly it will tell. As far as my knowledge is concerned an eye-diagram can't tell us that our impedance matching and our layout is correct. Correct me if iam wrong.

Can you just share me your thoughts on what to observe. Iam new to SI tool and analysis so please help me in this. Iam also attaching my simulation results with this mail. Please let me know how to add files as this group is not allowing pictures to be shared.

Thanks & Regards
Srikanth Chundi



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http://www.mesago.de/de/SPS/main.htm
Besuchen Sie uns auf der SPS/IPC/Drives 2009
vom 24. – 26. November 2009 in Nürnberg, in Halle 10 am Stand 130.

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I would suggest that you take a basic SI class, or read
some books on this topic. It is hard to give you any
meaningful answers to your questions in a short email...

Arpad
================================================== ========

-----Original Message-----
From: si-list-bounce (AT) freelists (DOT) org [mailto:si-list-bounce (AT) freelists (DOT) org]
On Behalf Of chundi srikanth
Sent: Friday, November 06, 2009 6:43 AM
To: si-list (AT) freelists (DOT) org
Subject: [SI-LIST] Query on Eye-Diagram of RX ADC

Hi Techies,
I have a question on Eye-diagram. We are having an interface between ADC
and
Virtex-5 FPGA. this interface is High-Speed differential interface. Iam
simulating the interface with Hyper Lynx BoardSim. I want to know What
are
the things i need to look up in the simulation so that i can say my
layout
is fine?

I have generated an eye-diagram using HyperLynx but what exactly it will
tell. As far as my knowledge is concerned an eye-diagram can't tell us
that
our impedance matching and our layout is correct. Correct me if iam
wrong.

Can you just share me your thoughts on what to observe. Iam new to SI
tool
and analysis so please help me in this. Iam also attaching my simulation
results with this mail. Please let me know how to add files as this
group is
not allowing pictures to be shared.

Thanks & Regards
Srikanth Chundi



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I have uploaded eye-diagrams whatever i have captured in the following link
in picasa. Please clarify.
http://picasaweb.google.co.in/lh/sre...swE&feat=email

<http://picasaweb.google.co.in/lh/sredir?uname=chundis&target=ALBUM&id=5400995939802 730097&authkey=Gv1sRgCIDs__mQy5bPswE&feat=email>Th anks
& regards
Srikanth

On Fri, Nov 6, 2009 at 7:47 PM, Muranyi, Arpad <Arpad_Muranyi (AT) mentor (DOT) com>wrote:

> I would suggest that you take a basic SI class, or read
> some books on this topic. It is hard to give you any
> meaningful answers to your questions in a short email...
>
> Arpad
> ================================================== ========
>
> -----Original Message-----
> From: si-list-bounce (AT) freelists (DOT) org [mailto:si-list-bounce (AT) freelists (DOT) org]
> On Behalf Of chundi srikanth
> Sent: Friday, November 06, 2009 6:43 AM
> To: si-list (AT) freelists (DOT) org
> Subject: [SI-LIST] Query on Eye-Diagram of RX ADC
>
> Hi Techies,
> I have a question on Eye-diagram. We are having an interface between ADC
> and
> Virtex-5 FPGA. this interface is High-Speed differential interface. Iam
> simulating the interface with Hyper Lynx BoardSim. I want to know What
> are
> the things i need to look up in the simulation so that i can say my
> layout
> is fine?
>
> I have generated an eye-diagram using HyperLynx but what exactly it will
> tell. As far as my knowledge is concerned an eye-diagram can't tell us
> that
> our impedance matching and our layout is correct. Correct me if iam
> wrong.
>
> Can you just share me your thoughts on what to observe. Iam new to SI
> tool
> and analysis so please help me in this. Iam also attaching my simulation
> results with this mail. Please let me know how to add files as this
> group is
> not allowing pictures to be shared.
>
> Thanks & Regards
> Srikanth Chundi
>
>
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request (AT) freelists (DOT) org with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
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>
> For help:
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>
>
> List technical documents are available at:
> http://www.si-list.net
>
> List archives are viewable at:
> http://www.freelists.org/archives/si-list
>
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
>
> ------------------------------------------------------------------
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>
> For help:
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>
>
> List technical documents are available at:
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>
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>
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
>
>


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There are several things wrong with your eye diagram,
for one, it doesn't seem that you have enough bits in
it, but the waveforms which make it up contain too many
wiggles which indicate lots of reflections in your
layout.

As I said before, I don't think you should expect to
get your training from emails in this forum. Please
take a class or read some books, or at the minimum
do a Google search on the topic. Here is one link
I found by typing "eye diagram" into Google:

http://www.highfrequencyelectronics....E1105_Tutorial.
pdf

and there are many more...

Arpad
================================================== ======
________________________________

From: chundi srikanth [mailto:chundis (AT) gmail (DOT) com]
Sent: Friday, November 06, 2009 8:26 AM
To: Muranyi, Arpad
Cc: si-list (AT) freelists (DOT) org
Subject: Re: [SI-LIST] Re: Query on Eye-Diagram of RX ADC


I have uploaded eye-diagrams whatever i have captured in the following
link in picasa. Please clarify.

http://picasaweb.google.co.in/lh/sre...rget=ALBUM&idT
00995939802730097&authkey=Gv1sRgCIDs__mQy5bPswE&fe at=email


<http://picasaweb.google.co.in/lh/sre...get=ALBUM&id=5
400995939802730097&authkey=Gv1sRgCIDs__mQy5bPswE&f eat=email> Thanks &
regards
Srikanth


On Fri, Nov 6, 2009 at 7:47 PM, Muranyi, Arpad
<Arpad_Muranyi (AT) mentor (DOT) com> wrote:


I would suggest that you take a basic SI class, or read
some books on this topic. It is hard to give you any
meaningful answers to your questions in a short email...

Arpad
================================================== =======

-----Original Message-----
From: si-list-bounce (AT) freelists (DOT) org
[mailto:si-list-bounce (AT) freelists (DOT) org]
On Behalf Of chundi srikanth
Sent: Friday, November 06, 2009 6:43 AM
To: si-list (AT) freelists (DOT) org
Subject: [SI-LIST] Query on Eye-Diagram of RX ADC

Hi Techies,
I have a question on Eye-diagram. We are having an interface
between ADC
and
Virtex-5 FPGA. this interface is High-Speed differential
interface. Iam
simulating the interface with Hyper Lynx BoardSim. I want to
know What
are
the things i need to look up in the simulation so that i can say
my
layout
is fine?

I have generated an eye-diagram using HyperLynx but what exactly
it will
tell. As far as my knowledge is concerned an eye-diagram can't
tell us
that
our impedance matching and our layout is correct. Correct me if
iam
wrong.

Can you just share me your thoughts on what to observe. Iam new
to SI
tool
and analysis so please help me in this. Iam also attaching my
simulation
results with this mail. Please let me know how to add files as
this
group is
not allowing pictures to be shared.

Thanks & Regards
Srikanth Chundi





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