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  #1 (permalink)  
Old 05-03-2006, 07:53 PM
Matt Blanton
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Default xst segmentation fault

After making some changes to some hardware that used to synthesize, xst now
seg faults. This is using the Xilinx EDK flow. The error looks like:
================================================== =======================
* Advanced HDL Synthesis *
================================================== =======================

Advanced RAM inference ...
Advanced multiplier inference ...
Advanced Registered AddSub inference ...
../synthesis.sh: line 3: 25715 Segmentation fault xst -ifn
system_xst.scr

I am wondering specifically if this is happening because I am trying to add
too many slaves to my PLB bus. I increased the max number of slaves allowed
on the PLB bus and I am now trying to put 33 slaves on there. Is that a
no-no? My other thought was that I could be trying to use more BRAM memory
than is available on my device. Would it be possible get a seg fault in
that case? Thanks for any pointers.

Matt
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  #2 (permalink)  
Old 05-03-2006, 07:55 PM
Antti Lukats
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Default Re: xst segmentation fault

"Matt Blanton" <[email protected]> schrieb im Newsbeitrag
news:[email protected]
> After making some changes to some hardware that used to synthesize, xst
> now
> seg faults. This is using the Xilinx EDK flow. The error looks like:
> ================================================== =======================
> * Advanced HDL Synthesis *
> ================================================== =======================
>
> Advanced RAM inference ...
> Advanced multiplier inference ...
> Advanced Registered AddSub inference ...
> ./synthesis.sh: line 3: 25715 Segmentation fault xst -ifn
> system_xst.scr
>
> I am wondering specifically if this is happening because I am trying to
> add
> too many slaves to my PLB bus. I increased the max number of slaves
> allowed
> on the PLB bus and I am now trying to put 33 slaves on there. Is that a
> no-no? My other thought was that I could be trying to use more BRAM memory
> than is available on my device. Would it be possible get a seg fault in
> that case? Thanks for any pointers.
>
> Matt


33 !? thats sounds like trouble!
why do you need them on PLB bus? add PLB-OPB bridge (or more than one)
and place some there

Antti


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  #3 (permalink)  
Old 05-03-2006, 11:34 PM
Matt Blanton
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Posts: n/a
Default Re: xst segmentation fault

I was hoping to avoid that because I am using a custom hardware module to
control plb bram controllers which write to the BRAMs. I assume moving to
the OPB will require a lot of changes to my hdl code and XPS project files,
but I may have to end up doing that if the number of slaves I have on the
PLB ends up being the problem. Thanks for the idea.

Matt

"Antti Lukats" <[email protected]> wrote in message
news:[email protected]
> "Matt Blanton" <[email protected]> schrieb im Newsbeitrag
> news:[email protected]
>> After making some changes to some hardware that used to synthesize, xst
>> now
>> seg faults. This is using the Xilinx EDK flow. The error looks like:
>> ================================================== =======================
>> * Advanced HDL Synthesis *
>> ================================================== =======================
>>
>> Advanced RAM inference ...
>> Advanced multiplier inference ...
>> Advanced Registered AddSub inference ...
>> ./synthesis.sh: line 3: 25715 Segmentation fault xst -ifn
>> system_xst.scr
>>
>> I am wondering specifically if this is happening because I am trying to
>> add
>> too many slaves to my PLB bus. I increased the max number of slaves
>> allowed
>> on the PLB bus and I am now trying to put 33 slaves on there. Is that a
>> no-no? My other thought was that I could be trying to use more BRAM
>> memory
>> than is available on my device. Would it be possible get a seg fault in
>> that case? Thanks for any pointers.
>>
>> Matt

>
> 33 !? thats sounds like trouble!
> why do you need them on PLB bus? add PLB-OPB bridge (or more than one)
> and place some there
>
> Antti
>



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  #4 (permalink)  
Old 05-04-2006, 09:41 AM
Alan Nishioka
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Default Re: xst segmentation fault

Matt Blanton wrote:
> I was hoping to avoid that because I am using a custom hardware module to
> control plb bram controllers which write to the BRAMs. I assume moving to
> the OPB will require a lot of changes to my hdl code and XPS project files,
> but I may have to end up doing that if the number of slaves I have on the
> PLB ends up being the problem. Thanks for the idea.


plb_v34.pdf says the maximum number of slaves is 16.
opb_v20.pdf says there is no maximum number of slaves, but Xilinx
recommends 16.

Perhaps you need a custom bram controller.

Alan Nishioka

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