FPGA Central

I have a 4 layer, development board in prototype stage. The board has an
XCR3128XL CPLD and a Spartan 3 XC3S400 FPGA both running at 3.3 volts. I
started out trying to program the CPLD with a simple clocked counter
process in VHDL. I am using a parallel 3 download cable. The code
simulates correctly, synthesises and fits, etc and, according the impact
software, programs correctly. I can erase the part, verify that it is
erased, program the part, verify that it's programmed, but I get no
response from any of the pins. I have checked the UCF file, pin reports,
power supply and ground pins on the device and everything looks fine but
still no output. I finally went down to even a simpler pin assignment:

outpin1 <= '1';
outpin2 <= '0';

Still no output. I did all of this on two assembled boards with the same
results. So, I finally figured I must have two fried CPLDs (one on each
board.)

I then turned my attention to the Spartin 3 device, set up a ucf, vhdl
file, ran it through the xilinx software, created an programming file
and again tried to program this part with the parallel 3 cable (JTAG
mode without a serial ROM). Again, the impact software says all is ok,
part erases, programs, verifies, but still no output. (also again on
both boards.)

Now, I'm not quite believing I have four bad parts that erase, program
and verify, (and get valid part descriptors)

Is it possible to program and verify a part that is foo bared?, or do I
have a screwed up programming cable? Anybody else been through this?

Mike