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  #1 (permalink)  
Old 11-09-2007, 05:09 AM
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Default Xilinx Parallel Cable IV, API spec

Is the hardware API for "Xilinx Parallel Cable IV Model DLC7"
published or does one have to figure that out by traditional
engineering methods ..?
(I want to know how to talk to the programmer cable by setting bits at
port 0x378..)

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Old 11-09-2007, 05:27 AM
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Default Re: Xilinx Parallel Cable IV, API spec

Maybe Xilinx Parallel Cable IV is backwards compatible with Paralllel
Cable III ..?? which is supported by xilprg-0.5 it seems.

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Old 11-09-2007, 09:04 AM
Antti
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Default Re: Xilinx Parallel Cable IV, API spec

On 9 Nov., 06:09, [email protected] wrote:
> Is the hardware API for "Xilinx Parallel Cable IV Model DLC7"
> published or does one have to figure that out by traditional
> engineering methods ..?
> (I want to know how to talk to the programmer cable by setting bits at
> port 0x378..)


it is SUPER SECRET

thats also the reason there are no 3rd party drivers
thats the reason why it works so bad - on most cases the Cable IV
works in Cable III fallback mode because of SUPERS**** windriver stuff
that just failes

the jedec file can however be readback, and i have jedec to vhdl
convertert that converts 98% correctly back to vhdl but have had no
time to fully RE the protocol

if somebody is interested i can release the jed2vhdl converter with
source codes, after little tweaking it should be able to produce VHDL
that can be compiled back to working cable IV CPLD

Antti









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Old 11-10-2007, 12:46 AM
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Default Re: Xilinx Parallel Cable IV, API spec

> it is SUPER SECRET
>
> thats also the reason there are no 3rd party drivers
> thats the reason why it works so bad - on most cases the Cable IV
> works in Cable III fallback mode because of SUPERS**** windriver stuff
> that just failes


The Parallel cable IV DLC7 rev4 uses Xilinx XCR3384XL (384 Macrocell
CPLD, 5V tolerant I/O pins with 3.3V core supply) and 40.000MHz clock.
Which software makes direct use of this cable ..?, trying to figure
out a setup for testing. Such that I can trigger an operation and
measure the resulting action.

The P-IV advantages over a plain parallel port interface is likely
only data integrity and improved speed over plain bit-banging. So it
uses ECP to get fast data transfer and add some data integrity check
like crc. Uses some fifo that directly feed the fpga through jtag or
cclk/d0 interface. In essence:
Parallel ECP -> CRC -> FIFO -> Bitbang

Otoh, It seems almost simpler to put together a CPLD + PHY and some
cables that will do the job without loops & hoops , but a finished
circuit has some advantages.

Don't forget to bite the hand that buys from you! :-)

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Old 11-10-2007, 02:29 AM
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Default Re: Xilinx Parallel Cable IV, API spec

On Nov 9, 7:46 pm, [email protected] wrote:

> The P-IV advantages over a plain parallel port interface is likely
> only data integrity and improved speed over plain bit-banging. So it
> uses ECP to get fast data transfer and add some data integrity check
> like crc. Uses some fifo that directly feed the fpga through jtag or
> cclk/d0 interface. In essence:
> Parallel ECP -> CRC -> FIFO -> Bitbang


I this day and age you might as well use USB, getting you
compatability with your travel laptop, etc...

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  #6 (permalink)  
Old 11-10-2007, 05:59 AM
Eric Smith
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Default Re: Xilinx Parallel Cable IV, API spec

[email protected] writes:
> I this day and age you might as well use USB, getting you
> compatability with your travel laptop, etc...


However, if you want to write your own code to talk to the standard
firmware of the Xilinx Platform USB Cable (rather than using Impact,
Chipscope, and XMD), you'll probably *still* have to reverse-engineer
the CPLD bits.
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  #7 (permalink)  
Old 11-10-2007, 07:29 AM
Antti
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Default Re: Xilinx Parallel Cable IV, API spec

On 10 Nov., 06:59, Eric Smith <[email protected]> wrote:
> [email protected] writes:
> > I this day and age you might as well use USB, getting you
> > compatability with your travel laptop, etc...

>
> However, if you want to write your own code to talk to the standard
> firmware of the Xilinx Platform USB Cable (rather than using Impact,
> Chipscope, and XMD), you'll probably *still* have to reverse-engineer
> the CPLD bits.


yes if you want to talk to ANY currently supported by xilinx cable you
need RE
only cable IV and usb cable are supported since xilinx has officially
dropped Cable III
support

Antti

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Old 11-10-2007, 05:28 PM
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Default Re: Xilinx Parallel Cable IV, API spec

On Nov 10, 12:59 am, Eric Smith <[email protected]> wrote:
> [email protected] writes:
> > I this day and age you might as well use USB, getting you
> > compatability with your travel laptop, etc...

>
> However, if you want to write your own code to talk to the standard
> firmware of the Xilinx Platform USB Cable (rather than using Impact,
> Chipscope, and XMD), you'll probably *still* have to reverse-engineer
> the CPLD bits.


But why would you want to use an expensive proprietary cable?

Get a cheap board with the cypress fx2 chip and implement a programmer
on that.

If you really want a manufacturer design for some reason, I believe
the working of the altera usb blaster has been explained well enough
that emulating it in an fx2 is possible. Besides, wouldn't it be fun
to program a xilinx part with an (emulated) altera cable?

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  #9 (permalink)  
Old 11-11-2007, 07:08 AM
Eric Smith
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Default Re: Xilinx Parallel Cable IV, API spec

[email protected] writes:
> But why would you want to use an expensive proprietary cable?


Because I actually *want* to be able to use the Xilinx tools,
especially Chipscope Pro.
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  #10 (permalink)  
Old 11-11-2007, 10:42 PM
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Default Re: Xilinx Parallel Cable IV, API spec

On Nov 11, 2:08 am, Eric Smith <[email protected]> wrote:
> [email protected] writes:
> > But why would you want to use an expensive proprietary cable?

>
> Because I actually *want* to be able to use the Xilinx tools,
> especially Chipscope Pro.


If you are intending to use the xilinx tools, then why can't you use
the xilinx tools to program the parts? ie, why do you need to talk to
the cable yourself??

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  #11 (permalink)  
Old 11-12-2007, 08:30 AM
Antti
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Default Re: Xilinx Parallel Cable IV, API spec

On 11 Nov., 23:42, [email protected] wrote:
> On Nov 11, 2:08 am, Eric Smith <[email protected]> wrote:
>
> > [email protected] writes:
> > > But why would you want to use an expensive proprietary cable?

>
> > Because I actually *want* to be able to use the Xilinx tools,
> > especially Chipscope Pro.

>
> If you are intending to use the xilinx tools, then why can't you use
> the xilinx tools to program the parts? ie, why do you need to talk to
> the cable yourself??


REASON 1:

tools provided by xilinx for Cable IV fail on most PC to work in high
speed Cable IV mode and fall back to Cable III compatible mode

REASON 2:

xilinx tools are not sufficient for many tasks
like if you want to program SPI flash on S3E over platform USB cable..
you can not, so need to RE the platform cable todo it, just one
example

Antti











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