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  #1 (permalink)  
Old 01-13-2005, 06:05 PM
Grégory Mermoud
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Default Xilinx FPGA editor

Hi all!

I wonder if it is possible to run a FPGA editor script without graphical
interface. Does it exist an option to run FPGA editor without its GUI ?

Grégory
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  #2 (permalink)  
Old 01-13-2005, 06:55 PM
Bret Wade
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Default Re: Xilinx FPGA editor

Grégory Mermoud wrote:
> Hi all!
>
> I wonder if it is possible to run a FPGA editor script without graphical
> interface. Does it exist an option to run FPGA editor without its GUI ?
>
> Grégory


Check out the "fpga_edline" command. It accepts script files with the
"-p <scr_file>" switch.

Example command to lock all macros in a design:
fpga_edline -p test.scr test.ncd

Where test.scr is:
select macro *
setattr Locate LOCK:HARD:0::
save
exit

Commands available are documented here:
http://toolbox.xilinx.com/docsan/xil...pga_editor.htm

Does anyone remember hm2nmc?

Cheers,
Bret

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  #3 (permalink)  
Old 01-13-2005, 11:12 PM
Grégory Mermoud
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Default Re: Xilinx FPGA editor

Bret Wade wrote:
> Grégory Mermoud wrote:
>
>> Hi all!
>>
>> I wonder if it is possible to run a FPGA editor script without
>> graphical interface. Does it exist an option to run FPGA editor
>> without its GUI ?
>>
>> Grégory

>
>
> Check out the "fpga_edline" command. It accepts script files with the
> "-p <scr_file>" switch.
>
> Example command to lock all macros in a design:
> fpga_edline -p test.scr test.ncd
>
> Where test.scr is:
> select macro *
> setattr Locate LOCK:HARD:0::
> save
> exit
>
> Commands available are documented here:
> http://toolbox.xilinx.com/docsan/xil...pga_editor.htm
>
> Does anyone remember hm2nmc?
>
> Cheers,
> Bret
>

That's nice thank you.
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  #4 (permalink)  
Old 01-14-2005, 12:24 AM
Bret Wade
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Posts: n/a
Default Re: Xilinx FPGA editor

Grégory Mermoud wrote:
> Bret Wade wrote:
>
>> Grégory Mermoud wrote:
>>
>>> Hi all!
>>>
>>> I wonder if it is possible to run a FPGA editor script without
>>> graphical interface. Does it exist an option to run FPGA editor
>>> without its GUI ?
>>>
>>> Grégory

>>
>>
>>
>> Check out the "fpga_edline" command. It accepts script files with the
>> "-p <scr_file>" switch.
>>
>> Example command to lock all macros in a design:
>> fpga_edline -p test.scr test.ncd
>>
>> Where test.scr is:
>> select macro *
>> setattr Locate LOCK:HARD:0::
>> save
>> exit
>>
>> Commands available are documented here:
>> http://toolbox.xilinx.com/docsan/xil...pga_editor.htm
>>
>> Does anyone remember hm2nmc?
>>
>> Cheers,
>> Bret
>>

> That's nice thank you.


You're welcome. I should also mention that it's possible to get examples
of the command line syntax by monitoring the file design_fpga_editor.out
(where design is your NCD design name) while performing the equivalent
operations manually in FPGA Editor. There is some buffering going on, so
you may have to perform extra operations before the editor dumps the
commands you're interested in. You can also get the syntax by recording
a script from the tool-->scripts menu.

Bret
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  #5 (permalink)  
Old 01-14-2005, 04:43 AM
Varun Jindal
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Default Re: Xilinx FPGA editor

What is possible use of FPGA Editor in batch mode !? .. i fail to
understand.

-- Varun

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  #6 (permalink)  
Old 01-14-2005, 06:56 AM
Bret Wade
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Default Re: Xilinx FPGA editor

Varun Jindal wrote:
> What is possible use of FPGA Editor in batch mode !? .. i fail to
> understand.
>
> -- Varun
>


Most things that can be done in FPGA Editor can be automated with a
script. If you have a repetitive task such as changing the configuration
of many IOBs in the same way, then you can do it manually for one IOB,
capture the necessary commands involved, and then write a script to do
the rest.

I once wrote an interactive perl script to add probes to a design before
the editor itself supported that feature.

NeoCAD used this feature ages ago to convert Xilinx hard macros (.hm) to
NeoCAD hard macros (.nmc) using EPIC, the predecessor to FPGA Editor.

Bret
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  #7 (permalink)  
Old 01-14-2005, 07:16 AM
Martin Kellermann
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Default Re: Xilinx FPGA editor

Hi Varun,

the most prominent thing that comes to my mind is e.g. adding probes to
a freshly inplemented (big) design. Saves you waiting for FPGA Editor to
load and process the design-graphics.

Cheers,

Martin

Varun Jindal wrote:
> What is possible use of FPGA Editor in batch mode !? .. i fail to
> understand.
>
> -- Varun
>


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