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  #1 (permalink)  
Old 05-04-2006, 02:10 AM
Ron
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Posts: n/a
Default Xilinx 3s8000?

Glory and riches are showered upon those who successfully factor one of
the RSA Challenge Numbers (see note [1]) ;-). I would like to be the
first to factor an RSA number using a standalone FPGA development
board(s) (ie; not connected to a conventional computer).

The RSA Challenge numbers have traditionally been solved by networks of
supercomputers using a distributed Number Field Sieve (NFS) or similar
method. Sieving is unfortunately not suited to FPGA implementation, but
there is another integer factorization method called the Elliptic Curve
Method (ECM, see note [3]) that I think might stand a chance of cracking
RSA-704. I have therefore designed and tested a Verilog implementation
of ECM with a compile time bus-width specification (ie; `define L 704)
so that it's easy to determine how the LUT requirement increases as I
change the bus width. I've optimized the circuit for gate count to the
extent of multiplexing everything that is used more than once (multiply,
divide, modulo, etc) - a process that almost brought tears to my eyes at
one point, because I had to eliminate several areas that naturally lent
themselves to parallelization.

Even so, the design requires far more LUTs than are currently available
from anyone as far as I know. I presently have Xilinx xc3s500e and Actel
ProASIC3E A3PE600 development boards, but I can't compile the design for
a 704 bit bus-width because I get the error message in Note [4] below (I
also get a similar message from the Actel synthesizer). I *can* compile
the design for a 384 bus-width however. Using a Xilinx 3s4000 as the
target device (even though I only have a 3s500) with a 384 bit
bus-width, I get the following Device utilization summary:
---------------------------
Selected Device : 3s4000fg676-4
Number of Slices: 49176 out of 27648 177% (*)
Number of Slice Flip Flops: 52253 out of 55296 94%
Number of 4 input LUTs: 83797 out of 55296 151% (*)
Number of bonded IOBs: 18 out of 489 3%
Number of GCLKs: 1 out of 8 12%
WARNING:Xst:1336 - (*) More than 100% of Device resources are used
---------------------------


This would lead me to believe that my design would require at least
101,376 LUTs, and probably more depending on how much of the FPGA is
consumed by routing. Since the Xilinx 3s4000 has 55296 LUTs and 27648
slices, I imagine a part with twice that number of slices & LUTs (a
Xilinx 3s8000 perhaps?) would be needed to fit my design. Anyone care to
hazard a guess as to if/when such a monster might be available?

Also, thus far the longest number that has been factored with ECM is
only 66 decimal digits (see Note [3]). If RSA-704 (212 decimal digits)
were factored, it would set a new record for ECM factoring also.

If such a device did become available, my only hope for acquiring the
requisite hardware/software would be to work out a deal with the FPGA
vendor or someone to lend me the necessary development board and s/w
tools in exchange for the potential fame and glory, since I am but a
humble retired engineer/hobbyist. :-)

Ron


_________________
Notes:

[1] RSA Challenge Numbers:
http://www.rsasecurity.com/rsalabs/node.asp?id=2093

[2] Factoring Methods:
http://mathworld.wolfram.com/PrimeFa...lgorithms.html

[3] Elliptic Curve Factorization Method
http://mathworld.wolfram.com/Ellipti...ionMethod.html

[4] When synthesizing ECM with a 704 bit bus-width for the Xilinx
xc3s4000-4fg676, I get:

ERROR: Portability:3 - This Xilinx application has run out of memory or
has encountered a memory conflict. Current memory usage is 2092148 kb.
Memory problems may require a simple increase in available system
memory, or possibly a fix to the software or a special workaround. To
troubleshoot or remedy the problem, first: Try increasing your system's
RAM. Alternatively, you may try increasing your system's virtual memory
or swap space. If this does not fix the problem, please try the
following: Search the Answers Database at support.xilinx.com to locate
information on this error message. If neither of the above resources
produces an available solution, please use Web Support to open a case
with Xilinx Technical Support off of support.xilinx.com. As it is
likely that this may be an unforeseen problem, please be prepared to
submit relevant design files if necessary.
ERROR: XST failed
Process "Synthesize" did not complete.
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  #2 (permalink)  
Old 05-04-2006, 02:31 AM
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

Ron <[email protected]> wrote:
>Glory and riches are showered upon those who successfully factor one of
>the RSA Challenge Numbers (see note [1]) ;-). I would like to be the
>first to factor an RSA number using a standalone FPGA development
>board(s) (ie; not connected to a conventional computer).


>The RSA Challenge numbers have traditionally been solved by networks of
>supercomputers using a distributed Number Field Sieve (NFS) or similar
>method. Sieving is unfortunately not suited to FPGA implementation, but
>there is another integer factorization method called the Elliptic Curve
>Method (ECM, see note [3]) that I think might stand a chance of cracking
>RSA-704. I have therefore designed and tested a Verilog implementation
>of ECM with a compile time bus-width specification (ie; `define L 704)
>so that it's easy to determine how the LUT requirement increases as I
>change the bus width. I've optimized the circuit for gate count to the
>extent of multiplexing everything that is used more than once (multiply,
>divide, modulo, etc) - a process that almost brought tears to my eyes at
>one point, because I had to eliminate several areas that naturally lent
>themselves to parallelization.


Why not use bricks with matrix or bus wired fpgas?, and let them share the
load. They got lvds etc.. so they can ship data quick within a board.
If one needs more horsepower one simple adds another brick to the backplane.

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  #3 (permalink)  
Old 05-04-2006, 04:31 AM
Peter Alfke
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Posts: n/a
Default Re: Xilinx 3s8000?

Spartan is the low-cost FPGA product line, and thus more limited in
size.
Virtex -2 and Virtex-4 offer bigger sizes and higher speed (at higher
cost)

If the design does not fit, partition it into several chips, probably
at minimal performance loss (if done right).

Peter Alfke, Xilinx

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  #4 (permalink)  
Old 05-04-2006, 08:42 AM
Mike Harrison
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Posts: n/a
Default Re: Xilinx 3s8000?

On Wed, 03 May 2006 18:10:15 -0700, Ron <[email protected]> wrote:

>Glory and riches are showered upon those who successfully factor one of
>the RSA Challenge Numbers (see note [1]) ;-). I would like to be the
>first to factor an RSA number using a standalone FPGA development
>board(s) (ie; not connected to a conventional computer).
>
>The RSA Challenge numbers have traditionally been solved by networks of
>supercomputers using a distributed Number Field Sieve (NFS) or similar
>method. Sieving is unfortunately not suited to FPGA implementation, but
>there is another integer factorization method called the Elliptic Curve
>Method (ECM, see note [3]) that I think might stand a chance of cracking
>RSA-704. I have therefore designed and tested a Verilog implementation
>of ECM with a compile time bus-width specification (ie; `define L 704)
>so that it's easy to determine how the LUT requirement increases as I
>change the bus width. I've optimized the circuit for gate count to the
>extent of multiplexing everything that is used more than once (multiply,
>divide, modulo, etc) - a process that almost brought tears to my eyes at
>one point, because I had to eliminate several areas that naturally lent
>themselves to parallelization.
>
>Even so, the design requires far more LUTs than are currently available
>from anyone as far as I know. I presently have Xilinx xc3s500e and Actel
>ProASIC3E A3PE600 development boards, but I can't compile the design for
>a 704 bit bus-width because I get the error message in Note [4] below (I
>also get a similar message from the Actel synthesizer). I *can* compile
>the design for a 384 bus-width however. Using a Xilinx 3s4000 as the
>target device (even though I only have a 3s500) with a 384 bit
>bus-width, I get the following Device utilization summary:
> ---------------------------
> Selected Device : 3s4000fg676-4
> Number of Slices: 49176 out of 27648 177% (*)
> Number of Slice Flip Flops: 52253 out of 55296 94%
> Number of 4 input LUTs: 83797 out of 55296 151% (*)
> Number of bonded IOBs: 18 out of 489 3%
> Number of GCLKs: 1 out of 8 12%
> WARNING:Xst:1336 - (*) More than 100% of Device resources are used
> ---------------------------
>
>
>This would lead me to believe that my design would require at least
>101,376 LUTs, and probably more depending on how much of the FPGA is
>consumed by routing. Since the Xilinx 3s4000 has 55296 LUTs and 27648
>slices, I imagine a part with twice that number of slices & LUTs (a
>Xilinx 3s8000 perhaps?) would be needed to fit my design. Anyone care to
>hazard a guess as to if/when such a monster might be available?
>
>Also, thus far the longest number that has been factored with ECM is
>only 66 decimal digits (see Note [3]). If RSA-704 (212 decimal digits)
>were factored, it would set a new record for ECM factoring also.
>
>If such a device did become available, my only hope for acquiring the
>requisite hardware/software would be to work out a deal with the FPGA
>vendor or someone to lend me the necessary development board and s/w
>tools in exchange for the potential fame and glory, since I am but a
>humble retired engineer/hobbyist. :-)
>
>Ron
>
>
>_________________
>Notes:
>
>[1] RSA Challenge Numbers:
>http://www.rsasecurity.com/rsalabs/node.asp?id=2093
>
>[2] Factoring Methods:
>http://mathworld.wolfram.com/PrimeFa...lgorithms.html
>
>[3] Elliptic Curve Factorization Method
>http://mathworld.wolfram.com/Ellipti...ionMethod.html
>
>[4] When synthesizing ECM with a 704 bit bus-width for the Xilinx
>xc3s4000-4fg676, I get:
>
>ERROR: Portability:3 - This Xilinx application has run out of memory or
>has encountered a memory conflict. Current memory usage is 2092148 kb.
> Memory problems may require a simple increase in available system
>memory, or possibly a fix to the software or a special workaround. To
>troubleshoot or remedy the problem, first: Try increasing your system's
>RAM. Alternatively, you may try increasing your system's virtual memory
>or swap space. If this does not fix the problem, please try the
>following: Search the Answers Database at support.xilinx.com to locate
>information on this error message. If neither of the above resources
>produces an available solution, please use Web Support to open a case
>with Xilinx Technical Support off of support.xilinx.com. As it is
>likely that this may be an unforeseen problem, please be prepared to
>submit relevant design files if necessary.
>ERROR: XST failed
>Process "Synthesize" did not complete.


Maybe you should talk to XIlinx about lending you a devboard for one of their high-end chips, in
return for some good publicity when you crack it..?
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  #5 (permalink)  
Old 05-04-2006, 11:17 AM
Ron
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Posts: n/a
Default Re: Xilinx 3s8000?

Mike Harrison wrote:
> Maybe you should talk to XIlinx about lending you a devboard for one of their high-end chips, in
> return for some good publicity when you crack it..?


Exactly what I was thinking Mike. :-) What's frustrating is that
although I could see spending a thousand or two thousand dollars for a
development board, I simply cannot justify spending $2,495 of my
retirement nest egg for the software tools alone.

I wonder if Peter Alfke of Xilinx would care to comment on the
possibility of my acquiring a loaner devboard and development s/w? I'm
located in the San Gabriel Valley just North-West of Los Angeles. The
email address I'm using ([email protected]) is valid by the way, at least
until it starts getting too much spam, and then I'll change it to News6,
News7, etc.

Some of the large computer software makers (MatLab, MapleSoft, etc)
offer non-profit discounts for educational and personal non-commercial
use. It would be wonderful if Xilinx (my favorite) or one of the other
FPGA vendors would offer some sort of low cost alternative to me and
those in my situation who would love to use your high end FPGAs, but
cannot afford the cost of the s/w development tools.

Thanks,

Ron
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  #6 (permalink)  
Old 05-04-2006, 04:38 PM
Austin Lesea
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Posts: n/a
Default Re: Xilinx 3s8000?

Ron,

We already sponsor this sort of research at many universities and schools.

If you want to go play, there are many excellent programs in graduate
education on the subject.

I am aware of a very active group at UCLA.

Austin

Ron wrote:

> Mike Harrison wrote:
>
>> Maybe you should talk to XIlinx about lending you a devboard for one
>> of their high-end chips, in
>> return for some good publicity when you crack it..?

>
>
> Exactly what I was thinking Mike. :-) What's frustrating is that
> although I could see spending a thousand or two thousand dollars for a
> development board, I simply cannot justify spending $2,495 of my
> retirement nest egg for the software tools alone.
>
> I wonder if Peter Alfke of Xilinx would care to comment on the
> possibility of my acquiring a loaner devboard and development s/w? I'm
> located in the San Gabriel Valley just North-West of Los Angeles. The
> email address I'm using ([email protected]) is valid by the way, at least
> until it starts getting too much spam, and then I'll change it to News6,
> News7, etc.
>
> Some of the large computer software makers (MatLab, MapleSoft, etc)
> offer non-profit discounts for educational and personal non-commercial
> use. It would be wonderful if Xilinx (my favorite) or one of the other
> FPGA vendors would offer some sort of low cost alternative to me and
> those in my situation who would love to use your high end FPGAs, but
> cannot afford the cost of the s/w development tools.
>
> Thanks,
>
> Ron

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  #7 (permalink)  
Old 05-04-2006, 05:36 PM
Lukasz Salwinski
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

Austin Lesea wrote:
> Ron,
>
> We already sponsor this sort of research at many universities and schools.
>
> If you want to go play, there are many excellent programs in graduate
> education on the subject.
>
> I am aware of a very active group at UCLA.
>
> Austin



uh... would you mind giving me a pointer to these guys ?

lukasz
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  #8 (permalink)  
Old 05-04-2006, 08:39 PM
Ron
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Posts: n/a
Default Re: Xilinx 3s8000?

Austin Lesea wrote:

> We already sponsor this sort of research at many universities and schools.
> If you want to go play, ...


Play? Research? How insulting. Didn't you read my original message at
all? There is no play or research involved. I suppose since this is a
hobby of mine, it could be considered "play" in a sense, but there is
also a $30,000 reward for factoring RSA-704 which isn't normally
associated with "play".

I have already designed and tested my circuit (both in simulation and on
a *REAL* FPGA, but using a smaller bus width). There is absolutely NO
research whatsoever involved, it's purely a pragmatic matter of
implementation and being able to afford your overpriced software design
tools on my retirement savings.

For what it's worth, I've had Fermat's Method of integer factorization
running on a Lattice LFEC20E FPGA for a couple of weeks so far (it's the
only algorithm small enough to fit on the Lattice board), but since it's
a sub-optimal factorization method, I have little or no hope that it
will ever find the answer. ECM is another matter however, because it's
well known and respected in numerical analysis circles. That and its
relative simplicity compared with NFS is the reason I chose it.

Gads, play indeed.

Ron
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  #9 (permalink)  
Old 05-04-2006, 09:22 PM
Austin Lesea
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Posts: n/a
Default Re: Xilinx 3s8000?

http://www.emsec.ee.ucla.edu/

Austin

Lukasz Salwinski wrote:

> Austin Lesea wrote:
>
>> Ron,
>>
>> We already sponsor this sort of research at many universities and
>> schools.
>>
>> If you want to go play, there are many excellent programs in graduate
>> education on the subject.
>>
>> I am aware of a very active group at UCLA.
>>
>> Austin

>
>
>
> uh... would you mind giving me a pointer to these guys ?
>
> lukasz

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  #10 (permalink)  
Old 05-04-2006, 09:33 PM
Austin Lesea
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

Ron,

I play everyday. Play is what some people call work who don't enjoy
what they do. My oldest brother Ron had a great attitude: if you don't
look forward to walking through the door in the morning: don't - go get
another job.

To help you win a prize is not in the realm of 'sponsored tax deductible
activities' that Xilinx is inclined to support.

I meant no disrespect. If you call it "hard work" then that is fine by me.

That prize for factoring is an incentive to continue the research in
cypher breaking, and improving computational methods.

We need no such prize: our customers have real problems (3-D Xray
imaging, 3G base stations, joint task strike fighter plane, Mars Rovers,
gigabit routers, etc.) that need our devices every day to solve their
problems.

That prize was 1.73 billion dollars (US)last year (Xilinx sales).

If you feel that you can win the prize, you should invest your own
money, and build the "solver." I have no doubt it will be done by
someone, and soon (since there are published papers on how to use FPGAs
to do this now for less money).

Austin

Ron wrote:

> Austin Lesea wrote:
>
>> We already sponsor this sort of research at many universities and
>> schools.
>> If you want to go play, ...

>
>
> Play? Research? How insulting. Didn't you read my original message at
> all? There is no play or research involved. I suppose since this is a
> hobby of mine, it could be considered "play" in a sense, but there is
> also a $30,000 reward for factoring RSA-704 which isn't normally
> associated with "play".
>
> I have already designed and tested my circuit (both in simulation and on
> a *REAL* FPGA, but using a smaller bus width). There is absolutely NO
> research whatsoever involved, it's purely a pragmatic matter of
> implementation and being able to afford your overpriced software design
> tools on my retirement savings.
>
> For what it's worth, I've had Fermat's Method of integer factorization
> running on a Lattice LFEC20E FPGA for a couple of weeks so far (it's the
> only algorithm small enough to fit on the Lattice board), but since it's
> a sub-optimal factorization method, I have little or no hope that it
> will ever find the answer. ECM is another matter however, because it's
> well known and respected in numerical analysis circles. That and its
> relative simplicity compared with NFS is the reason I chose it.
>
> Gads, play indeed.
>
> Ron

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  #11 (permalink)  
Old 05-04-2006, 09:37 PM
Peter Alfke
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

C'mon Ron, have a sense of perspective.

You claim it is not research because it is already well-understood, and
it is not play (but rather a hobby), because you want to make money by
winning the prize. And Austin told you that you have "competition",
since several universities try to do the same thing.

Maybe we can find a way, but please don't be too thin-skinned.

Peter Alfke

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  #12 (permalink)  
Old 05-04-2006, 09:39 PM
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

Hi Ron,

I have four suggestions for you:

1. there is a huge difference between "integer factorization" and
"factorization of RSA numbers". Methods for the first one that do not
work for the second one are among others "Fermat's Method" and
EC-factorization (but there are some exceptions).


2. get a cheap medium size FPGA. Altera CycloneII or Xilinx Spartan 3
on a cheap board. Re-write your code until it fits, I have seen this
sort of stuff in mush smaller devices than 3s4000. read some articles
on, e.g. CPU design. And learn how to use your FPGA!


3. I have already seen some of your code and I suggest you publish it
somewhere so people can learn from it and/or help improving it.


4. 30000 USD is probably a tiny fraction of what it will cost to factor
a RSA-704 number. my guess is that it would cost between 50 to 100M USD
today, and that does not include the billions that have already been
used for research in universities and various TLAs...


Of course, in your case the journey is more rewarding than the contest
reward itself. You will learn a lot, as I did 10-15 years ago when I
was first introduced this stuff.






good luck,
and have fun!

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  #13 (permalink)  
Old 05-04-2006, 11:28 PM
Lukasz Salwinski
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

Austin Lesea wrote:
> http://www.emsec.ee.ucla.edu/
>
> Austin
>
> Lukasz Salwinski wrote:
>
>> Austin Lesea wrote:
>>
>>> Ron,
>>>
>>> We already sponsor this sort of research at many universities and
>>> schools.
>>>
>>> If you want to go play, there are many excellent programs in graduate
>>> education on the subject.
>>>
>>> I am aware of a very active group at UCLA.
>>>
>>> Austin

>>
>> uh... would you mind giving me a pointer to these guys ?
>>
>> lukasz



thanks ;o)
l
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  #14 (permalink)  
Old 05-04-2006, 11:42 PM
Austin Lesea
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

Lukasz,

You are welcome. The UC system in California is as impersonnal as ever:
if you want a great education, you have to go and get it (no one in
the UC system is there to help you - there are at least fifty students
waiting to get in, so if you drop out, who cares? NO ONE!).

So, if I have helped in some small way, that is great.

For anyone offended by my opinion (backed by my experience of being a
student, professional engineering employee, and a professor at UC
Berkeley), I offer no apology. Been there, saw that. Seen that it
hasn't changed (nor why should/could it?).

Great schools (all campuses), highly recommended. Just don't expect
anyone to hold your hand, that is all.

For a kinder and gentler college experience, there is this school right
across the bay from Berkeley....(also a great school). I am sure there
is the equivalent in the LA basin as well...

Just don't ask me to cheer for their football teams.

Go Bears!

Austin

Lukasz Salwinski wrote:

> Austin Lesea wrote:
>
>> http://www.emsec.ee.ucla.edu/
>>
>> Austin
>>
>> Lukasz Salwinski wrote:
>>
>>> Austin Lesea wrote:
>>>
>>>> Ron,
>>>>
>>>> We already sponsor this sort of research at many universities and
>>>> schools.
>>>>
>>>> If you want to go play, there are many excellent programs in
>>>> graduate education on the subject.
>>>>
>>>> I am aware of a very active group at UCLA.
>>>>
>>>> Austin
>>>
>>>
>>> uh... would you mind giving me a pointer to these guys ?
>>>
>>> lukasz

>
>
>
> thanks ;o)
> l

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  #15 (permalink)  
Old 05-05-2006, 12:35 AM
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?


Ron wrote:
> I have already designed and tested my circuit (both in simulation and on
> a *REAL* FPGA, but using a smaller bus width). There is absolutely NO
> research whatsoever involved, it's purely a pragmatic matter of
> implementation and being able to afford your overpriced software design
> tools on my retirement savings.


Hi Ron,

I "play" most days too with large FPGAs as a consultant, small business
owner, and hobbiest. There are much more affordable ways to tackle
these larger problems than rushing out and paying retail that many of
us use instead. Building your own FPGA boards is not nearly as
difficult as it might seem, if you keep a KISS (Keep it Simple Stupid)
design goal clearly in mind. I've helped other homebrew folks do the
same, drop me a note if you need some guidance.

Consider using NOS (New Old Stock) parts available from Gray Market
sources, such as Ebay. Your 100,000 LUTs can be found in ten Xilinx
XC2V1000-4FF896C FPGAs listed in item 7606455467 for roughly $730 US. I
believe that seller has a few more as well, and they have been listed
for some time, so if you made an offer, they might be available for
quite a bit less if you are willing to take them all. Add in the $300
price of 2 4-layer PCBs from PCB Express,
and you too can have your own NEW homebrew FPGA super computer running
for about $1,000 US in a month or two of fun hardware/software
projects.

A little more risk (but manageable) is recycling FPGAs from scrapped
boards available from a number of sources, including Ebay. Reballing
FPGA can also be done at home, using little more than a toaster oven
(with electronic controls, or a convection oven). Larger Altera and
Xilinx FPGA's can frequently be had for under $100ea as scrap. See Ebay
lot 7613930035. Using recycled parts, you can save another 80% or more
off NOS parts, but they require an investment in reballing supplies
(min order on preforms). A larger 300,000 LUT or more home FPGA super
computer can easily be built under $1,000US using this strategy.

I reball/recycle parts frequently to cut costs in prototyping
(including reusing first run parts on a prototype design when I cut the
second/third revison boards). This can substantially cut prototyping
costs for contracts, as well as hobby projects.

Have Fun!
John

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  #16 (permalink)  
Old 05-05-2006, 12:44 PM
c d saunter
Guest
 
Posts: n/a
Default Re: Xilinx 3s8000?

Ron ([email protected]) wrote:
: Glory and riches are showered upon those who successfully factor one of
: the RSA Challenge Numbers (see note [1]) ;-). I would like to be the
: first to factor an RSA number using a standalone FPGA development
: board(s) (ie; not connected to a conventional computer).

<big snip>

: If such a device did become available, my only hope for acquiring the
: requisite hardware/software would be to work out a deal with the FPGA
: vendor or someone to lend me the necessary development board and s/w
: tools in exchange for the potential fame and glory, since I am but a
: humble retired engineer/hobbyist. :-)

Ron,
Perhaps you could partner with a local university and form an
undergraduate project based on this? I say this because universities
have access to this rather nice board at an affordable price...

http://www.xilinx.com/univ/xupv2p.html

Unless you could shrink the design you'd need to join several boards...

Cheers
cds
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  #17 (permalink)  
Old 05-05-2006, 04:19 PM
Lukasz Salwinski
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Posts: n/a
Default Re: Xilinx 3s8000?

Austin Lesea wrote:
> [...]
> For a kinder and gentler college experience, there is this school right
> across the bay from Berkeley....(also a great school). I am sure there
> is the equivalent in the LA basin as well...
> [...]

yup. it's called USC ;o)
l

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  #18 (permalink)  
Old 05-05-2006, 07:33 PM
Ron
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Posts: n/a
Default Re: Xilinx 3s8000?

Austin Lesea wrote:
> That prize was 1.73 billion dollars (US)last year (Xilinx sales).


I complain about your software design tools being too overpriced for a
mere retired engineer to afford, and you come back bragging about
Xilinx's profits last year?

Personally I think it's unethical for you Xilinx ****wits to be using a
public forum to promote your products.

Ron

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  #19 (permalink)  
Old 05-05-2006, 07:46 PM
Peter Alfke
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Default Re: Xilinx 3s8000?

Ron, here is some friendly advice, from one senior citizen to another:

If you expect some asistance of any kind, calling us "you Xilinx
****wits" is not a very helpful comment.
It's not appropriate under any circumstances. It just reflects badly on
you, I am sorry to say...

Peter Alfke, Xilinx Applications

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  #20 (permalink)  
Old 05-05-2006, 08:05 PM
Ron
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Default Re: Xilinx 3s8000?

Peter Alfke wrote:
> If you expect some asistance of any kind,


Not any more I don't. I realized right away that you money grubbing
SOB's from Xilinx couldn't care less about promoting your products to
anyone who doesn't come to you with bulging pockets full of money.

The irony is that the Lattice support people I have corresponded with
have been very helpful and friendly.

Ron
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  #21 (permalink)  
Old 05-05-2006, 08:46 PM
Ron
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Default Re: Xilinx 3s8000?

[email protected] wrote:
> Consider using NOS (New Old Stock) parts available from Gray Market
> sources, such as Ebay.


Thanks for the tip John. It's the best (and *only*, Ha!) advice I've
received here. It would never have occurred to me to look for FPGA parts
on ebay, but they have quite a huge selection of things to choose from.

Ron
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  #22 (permalink)  
Old 05-05-2006, 09:13 PM
Austin Lesea
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Default <ignore thread>

Ron,

I thank you for your gift of such supreme and sublime eloquence and
expression.

Austin
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  #23 (permalink)  
Old 05-05-2006, 09:53 PM
Ron
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Default Re: <ignore thread>

Austin Lesea wrote:
> I thank you for your gift of such supreme and sublime eloquence and
> expression.


I try to adapt my phraseology to match the IQ of my target audience. In
the case of Xilinx application engineers I'm forced to constrain my
vocabulary to simple words understandable by simple minds.
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  #24 (permalink)  
Old 05-05-2006, 10:24 PM
John_H
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Default Re: Xilinx 3s8000?

"Ron" <[email protected]> wrote in message news:[email protected]
> Austin Lesea wrote:
>> That prize was 1.73 billion dollars (US)last year (Xilinx sales).

>
> I complain about your software design tools being too overpriced for a
> mere retired engineer to afford, and you come back bragging about Xilinx's
> profits last year?
>
> Personally I think it's unethical for you Xilinx [expletive] to be using a
> public forum to promote your products.
>
> Ron


The involvement is to HELP folks on this board, not (purposely) to promote
the products.

Bite the hand.


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  #25 (permalink)  
Old 05-05-2006, 10:26 PM
John_H
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Posts: n/a
Default Re: Xilinx 3s8000?

"Ron" <[email protected]> wrote in message news:[email protected]
> Peter Alfke wrote:
>> If you expect some asistance of any kind,

>
> Not any more I don't. I realized right away that you money grubbing SOB's
> from Xilinx couldn't care less about promoting your products to anyone who
> doesn't come to you with bulging pockets full of money.
>
> The irony is that the Lattice support people I have corresponded with have
> been very helpful and friendly.
>
> Ron


Once you realized a business wasn't willing to provide you with something
worth the price of a car so you could win $30,000.... Folks here were
helpful and friendly until you decided to stink up the place.


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