FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal


Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 05-27-2005, 03:54 PM
Posts: n/a
Default Wrong type name (subtitution) in post-place & route simulation model.

Hi All.

Having a module with input signal of my own type,
described in package (which is simply
"type MYTYPE is array in 0 to n of std_logic_vector(k downto 0)"),
i am facing the following problem: in post-place&route(PPR) model
this type is substituted on "std_logic_vector2(n downto,k downto 0)" :-/
so ModelSim obviously argues "Default binding had errors for entity
"my_comp" on the component declaration".
I generate the model in ISE 6.3

Sorry if the question is stupid, but is there any way to fix such
situation rather than manually change
the PPR model file. As I can see my package is simply ignored.

Thank you for help.
Reply With Quote


Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On

Similar Threads
Thread Thread Starter Forum Replies Last Post
XPower: Post-Place and Route Simulation model Edward FPGA 6 08-09-2006 04:16 PM
Post-Place & Route Simulation with ISE arkaitz FPGA 3 04-30-2004 08:27 AM
Post-Place & Route simulation with MicroBlaze arkaitz FPGA 4 01-23-2004 07:15 PM

All times are GMT +1. The time now is 03:18 AM.

Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved