FPGA Central

Hello,

I can download a program to memory using "nios-run my_prog.srec" and
it works fine.

However, when I write the program into the same memory manually (ie.
memory fill command), nios will not wrong the program properly.

I verified that both methods write exactly the same program bytes into
memory, but nios-run does something with the memory AFTER the program
end. This must be the source of my problems. Why are bytes changed
after the end of the program?

I verified every byte up until the last byte written as defined by the
S-Record.

Any ideas on what steps nios-run goes through?

Help is greatly appreciated.

What are you talking about?

"cruzin" <[email protected]> wrote in message
news:[email protected] om...
> Hello,
>
> I can download a program to memory using "nios-run my_prog.srec" and
> it works fine.
>
> However, when I write the program into the same memory manually (ie.
> memory fill command), nios will not wrong the program properly.
>
> I verified that both methods write exactly the same program bytes into
> memory, but nios-run does something with the memory AFTER the program
> end. This must be the source of my problems. Why are bytes changed
> after the end of the program?
>
> I verified every byte up until the last byte written as defined by the
> S-Record.
>
> Any ideas on what steps nios-run goes through?
>
> Help is greatly appreciated.

[email protected] (cruzin) writes:

> I can download a program to memory using "nios-run my_prog.srec" and
> it works fine.
>
> However, when I write the program into the same memory manually (ie.
> memory fill command), nios will not wrong the program properly.

Maybe a stupid question: How do you run your manually entered program?
Are you using the go (G) command in germs? Can you use go to *re-run*
the downloaded srec file?

Petter
--
A: Because it messes up the order in which people normally read text.
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A: Top-posting.
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Hi Petter,

I wrote a program to convert an Srec file to a binary file and then
downloaded this over a PCI/Avalon bridge.

I have found my problem, which was that I assumed the Srec file was
always writing a contiguous memory region, when in fact sometimes
addresses are skipped, presumably for alignment optimization.


> [email protected] (cruzin) writes:
>
> > I can download a program to memory using "nios-run my_prog.srec" and
> > it works fine.
> >
> > However, when I write the program into the same memory manually (ie.
> > memory fill command), nios will not wrong the program properly.
>
> Maybe a stupid question: How do you run your manually entered program?
> Are you using the go (G) command in germs? Can you use go to *re-run*
> the downloaded srec file?
>
> Petter

cruzin <[email protected]> wrote in message
news:[email protected] om...
> Hi Petter,
>
> I wrote a program to convert an Srec file to a binary file and then
> downloaded this over a PCI/Avalon bridge.
>
> I have found my problem, which was that I assumed the Srec file was
> always writing a contiguous memory region, when in fact sometimes
> addresses are skipped, presumably for alignment optimization.

If you have a look at the srec spec, I'm fairly sure the
first data after the 's' on every line is the address that
line starts at.


Nial

------------------------------------------------
Nial Stewart Developments Ltd
FPGA and High Speed Digital Design
Cyclone based 'Easy PCI' dev board
www.nialstewartdevelopments.co.uk

Hi Nial,

Yes you are correct.

When I wrote my Srec-converter program, I looked at a nios-built Srec
file, and all records were contiguous. Later on, I realized in some
programs, nios-build will skip bytes here and there. Live and learn.

> cruzin <[email protected]> wrote in message
> news:[email protected] om...
> > Hi Petter,
> >
> > I wrote a program to convert an Srec file to a binary file and then
> > downloaded this over a PCI/Avalon bridge.
> >
> > I have found my problem, which was that I assumed the Srec file was
> > always writing a contiguous memory region, when in fact sometimes
> > addresses are skipped, presumably for alignment optimization.
>
> If you have a look at the srec spec, I'm fairly sure the
> first data after the 's' on every line is the address that
> line starts at.
>
>
> Nial
>
> ------------------------------------------------
> Nial Stewart Developments Ltd
> FPGA and High Speed Digital Design
> Cyclone based 'Easy PCI' dev board
> www.nialstewartdevelopments.co.uk