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Old 11-06-2003, 10:50 AM
Terrence Mak
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Default Virtex2Pro--ppc405-FPGA communication


I have successeuse config the virtex2Pro with a elf file and bit stream file
independently. But how to make the powerpc and the fpga logics work

Can I use the BRAM as an interface between the FPGA and powerpc? It means
that I read data from the internal BRAM by the powerpc after the FPGA logics
stored value in BRAM.What's the function in the C library is relating to the
internal BRAM data retrieval?

For the FPGA design, I am using System Generator, can i specify the
interface or BUS (PLB) within the syste mgenerator environment, which is the
communication channel between the powerpc and FPGA? or there are other
approach to have SW/HW codesign by using system generator?

Many thanks!!


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