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Old 11-12-2003, 01:59 PM
Jan Panteltje
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Default Trying to digitize video with CTT differential input, but webpack wont't cooperate...:-)

I thought just for fun let me try to digitize some video
using the input comparator.
I am stuck with 3.3 V I/O on Spartan 2 because of the
proto board...
So then CTT works on 3.3 V and 1.5 V rteference, should do something
with 1.5 V signal...

But now the problem:

ERROR:Place:1747 - The IOB video_in is locked to site P110 in bank 3. This
true

violates the SelectIO banking rules. Other incompatible IOBs may be locked to
the same bank, or this IOB may be illegally locked to a Vref site. Please
? of cause they may be, but they are not...

consult the SelectIO application node.
where would that be?

ERROR:Place:993 - Due to Virtex SelectIO banking constraints, the IOBs in your
design cannot be automatically placed.
It's a Spartan 2, not a Virtex...!

I did:
// For the r2r ladder that drives the Vref is here:
OBUF_CTT da0(.I(da_output[0]), .O(da_out[0]) );
OBUF_CTT da1(.I(da_output[1]), .O(da_out[1]) );
OBUF_CTT da2(.I(da_output[2]), .O(da_out[2]) );
OBUF_CTT da3(.I(da_output[3]), .O(da_out[3]) );
OBUF_CTT da4(.I(da_output[4]), .O(da_out[4]) );
OBUF_CTT da5(.I(da_output[5]), .O(da_out[5]) );
OBUF_CTT da6(.I(da_output[6]), .O(da_out[6]) );
OBUF_CTT da7(.I(da_output[7]), .O(da_out[7]) );

// The video is on the other side of the comparator...
IBUF_CTT vidin(.I(video_in), .O(inbit) );

In the constraints file the ports are specified as normal.
All these pins (and no other) are on bank 3.
So what do I do wrong?

Must be some silly thing...
Simulation works fine, 8 bits video, 100 MHz clock, should at least do something..
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