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Old 11-18-2007, 10:02 AM
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Default synthesizing vqm with parameters with quartus 7.1sp1

Hi,

I have a verilog module in my project, which is instantiated in the
design 3 times, each time with different parameters. I generated 3
different vqm files outside the Quartus project (with Synplify), one
for each instantiation. How can I tell Quartus which vqm file should
be linked to its appropriate block?

With regards,
Hezi
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Old 11-18-2007, 06:53 PM
KJ
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Default Re: synthesizing vqm with parameters with quartus 7.1sp1


<[email protected]> wrote in message
news:[email protected]m...
> Hi,
>
> I have a verilog module in my project, which is instantiated in the
> design 3 times, each time with different parameters. I generated 3
> different vqm files outside the Quartus project (with Synplify), one
> for each instantiation. How can I tell Quartus which vqm file should
> be linked to its appropriate block?
>


By writing the code that instantiates the blocks

KJ


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