Vax,
DesignF/X(TM) - is specifically designed for this task and delivers
easy, rapid and accurate **Xilinx**
FPGA pin assignment. DesignF/X
capabilites include:
1) Extensive DRCs that include all published rules related to pin
assignment.
2) Focus-filters that ensure only compatible pins can be assigned into
banks - for both single ended and differential signals.
3) Clock/data pin sync to enable rapid local and global clock driven
systems implementations.
4) Weighted Average SSO (WASSO) calculations that provide an essential
SSO check.
5) A comprehensive but easy-to-use GUI that supports rapid feedback,
problem resolution and task completion to make DesignF/X the easiest,
fastest and most accurate method of Xilinx
FPGA pin assignment
available today.
We invite you to join several other
FPGA designers and find out more
for yourself with our free trial download at
http://www.prodacc.com
With best wishes,
Manu Pillai
vax, 9000 wrote:
> I am a newbie and I need rules to assign pins to FPGA. I would
imagine some,
>
> 1. Group signals that are natually related, and assign them to the
same I/O
> bank/side of the FPGA;
> 2. Let the software to assign pins, then fix some pins according to
the
> automatic assignment, then let the software run again. Do this
iteratively
> for several times.
>
> What is your experience? Suggestions are welcomed.
>
> vax, 9000