FPGA Central

I don't know of any ready-to-use solution for this, so I guess you will
have to design your own. You could use a user-JTAG module in your
design (have a look at BSCAN_SPARTAN3 in the libraries guide). This
will allow you get data in and out of your FPGA through the JTAG port.

Then you will need a little logic to interface the JTAG module with
your SRAM controller.

On the PC side, you will need to write a small application that writes
the data to your JTAG controller (parallel cable III or IV). A
so-called "Tcl/JTAG Interface" which provides all the basic JTAG
functions is available from Xilinx and comes with the Chipscope Pro
Software ; have a look at the Chipscope manual.

Hope this helps.

Have fun,
Guy.


Vivek Joshi wrote:
> I had a question on whether you can use Chipscope pro to load an
external SRAM connected to the FPGA. I want to use ChipSCope Pro to
load data into an SRAM, is there a way to automate this, any
suggestions or comments regarding this? Is this a feasible idea?

> Vivek Joshi wrote:
> > I had a question on whether you can use Chipscope pro to load an
> external SRAM connected to the FPGA. I want to use ChipSCope Pro to
> load data into an SRAM, is there a way to automate this, any
> suggestions or comments regarding this? Is this a feasible idea?

the TCL interface does allow to talk to BSCAN yes, but if you want to use
ChipScope and load memories you need a bit more work, its doable but you
must regenerate ICON with no BSCAN instance and connect ICON to it manually,
and connect your custom cores for ram loading to the other free BSCAN user
port. then you can use tcl to download rams and at the same time keep
chipscope funtionlity

Antti
http://xilinx.openchip.org