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Old 02-21-2010, 03:51 AM
Test01
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Default Question about altera root-port for Stratix4GX Hard IP

I have a question about Altera Stratix4GX PCIe Hard IP root port
question. As per my understanding, the back end of the root-port
supports Avalon ST Bus thorugh which I can feed TLPs to pass
transactions downstream using the Hard IP root port. Is it possible
to put it in a mode where all the transactions are passed on
downstream - even the PCI conig cycles?
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