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  #1 (permalink)  
Old 05-25-2006, 07:39 AM
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Default problem programming Altera Cyclone device

Hello everyone,

I am trying to program an Altera Cyclone (EP1C20) device, which comes
with the NiosII processor already in it, using the Quartus 5.0
software.
My connection to the board is via the JTAG connection.

When programming, I get no errors from the Quartus software, but
immediately after programming has been completed, the board resets and
starts the Nios system again, as if nothing happened.

What am I doing wrong?


Thanks in advance,
Roi

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  #2 (permalink)  
Old 05-25-2006, 09:21 AM
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Default Re: problem programming Altera Cyclone device

>...Altera Cyclone...immediately after programming...
>the board resets...


It could be many things. Why do you think that it's a problem in
programming?

One common reason for reset when an Altera device starts to run is
leaving the "unused pins" configuration set to "output driving low" (a
stupid default in Quartus).
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  #3 (permalink)  
Old 05-25-2006, 09:33 AM
Nial Stewart
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Default Re: problem programming Altera Cyclone device

<[email protected]> wrote in message news:[email protected] oups.com...
> Hello everyone,
>
> I am trying to program an Altera Cyclone (EP1C20) device, which comes
> with the NiosII processor already in it, using the Quartus 5.0
> software.
> My connection to the board is via the JTAG connection.
>
> When programming, I get no errors from the Quartus software, but
> immediately after programming has been completed, the board resets and
> starts the Nios system again, as if nothing happened.
>
> What am I doing wrong?



Is this a NiosII design of your own targeted at the Altera Nios eval
board?

If so then the config prom has a line from the FPGA, reconfig_req, that
allows any Nios to request a reconfiguration. You need to set this
permanently high (and assign it to the correct pin).


Nial.



----------------------------------------------------------
Nial Stewart Developments Ltd Tel: +44 131 561 6291
42/2 Hardengreen Business Park Fax: +44 131 561 6327
Dalkeith, Midlothian
EH22 3NU
www.nialstewartdevelopments.co.uk


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  #4 (permalink)  
Old 05-25-2006, 11:31 AM
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Default Re: problem programming Altera Cyclone device


Nial Stewart wrote:
> <[email protected]> wrote in message news:[email protected] oups.com...
> > Hello everyone,
> >
> > I am trying to program an Altera Cyclone (EP1C20) device, which comes
> > with the NiosII processor already in it, using the Quartus 5.0
> > software.
> > My connection to the board is via the JTAG connection.
> >
> > When programming, I get no errors from the Quartus software, but
> > immediately after programming has been completed, the board resets and
> > starts the Nios system again, as if nothing happened.
> >
> > What am I doing wrong?

>
>
> Is this a NiosII design of your own targeted at the Altera Nios eval
> board?


This is a design of my own not related in any way to NiosII.
For the sake of testing, I also tried to program a simple blinking led
design, and got the same result.

>
> If so then the config prom has a line from the FPGA, reconfig_req, that
> allows any Nios to request a reconfiguration. You need to set this
> permanently high (and assign it to the correct pin).


How do I do that? is it a jumper or a Quartus setting or what?


>
>
> Nial.
>
>
>
> ----------------------------------------------------------
> Nial Stewart Developments Ltd Tel: +44 131 561 6291
> 42/2 Hardengreen Business Park Fax: +44 131 561 6327
> Dalkeith, Midlothian
> EH22 3NU
> www.nialstewartdevelopments.co.uk


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  #5 (permalink)  
Old 05-25-2006, 12:02 PM
Nial Stewart
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Posts: n/a
Default Re: problem programming Altera Cyclone device

>> > I am trying to program an Altera Cyclone (EP1C20) device, which comes
>> > with the NiosII processor already in it, using the Quartus 5.0
>> > software.
>> > My connection to the board is via the JTAG connection.
>> >
>> > When programming, I get no errors from the Quartus software, but
>> > immediately after programming has been completed, the board resets and
>> > starts the Nios system again, as if nothing happened.
>> > What am I doing wrong?


>> Is this a NiosII design of your own targeted at the Altera Nios eval
>> board?

>
> This is a design of my own not related in any way to NiosII.
> For the sake of testing, I also tried to program a simple blinking led
> design, and got the same result.



Are you using the NiosII development board to test your design?


What did you mean by "which comes with the NiosII processor already in it"?

If so, then the FPGA configuration is controlled by a small CPLD. When the
board boots up I think this looks for the presence of several images in flash,
picks one then configures the FPGA.

There's a line from the FPGA to this config controller, called reconfigreq_n
which allows a Nios to cause the FPGA to be re-configured. If you don't
drive this inactive then as soon as your design boots up the FPGA will go
through a re-configuration and one of the valid Nios images will be loaded.


>> If so then the config prom has a line from the FPGA, reconfig_req, that
>> allows any Nios to request a reconfiguration. You need to set this
>> permanently high (and assign it to the correct pin).

>
> How do I do that? is it a jumper or a Quartus setting or what?


You need to add an output to your design (call it anything you want), set it high
and assign it to the correct pin. On the CycloneII board with the EP2C35 it's
pin AA14.


Nial


----------------------------------------------------------
Nial Stewart Developments Ltd Tel: +44 131 561 6291
42/2 Hardengreen Business Park Fax: +44 131 561 6327
Dalkeith, Midlothian
EH22 3NU
www.nialstewartdevelopments.co.uk




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  #6 (permalink)  
Old 05-25-2006, 08:28 PM
Roi
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Default Re: problem programming Altera Cyclone device


Nial Stewart wrote:
> >> > I am trying to program an Altera Cyclone (EP1C20) device, which comes
> >> > with the NiosII processor already in it, using the Quartus 5.0
> >> > software.
> >> > My connection to the board is via the JTAG connection.
> >> >
> >> > When programming, I get no errors from the Quartus software, but
> >> > immediately after programming has been completed, the board resets and
> >> > starts the Nios system again, as if nothing happened.
> >> > What am I doing wrong?

>
> >> Is this a NiosII design of your own targeted at the Altera Nios eval
> >> board?

> >
> > This is a design of my own not related in any way to NiosII.
> > For the sake of testing, I also tried to program a simple blinking led
> > design, and got the same result.

>
>
> Are you using the NiosII development board to test your design?
>


Yes. I am using Nios development kit cyclone edition.

>
> What did you mean by "which comes with the NiosII processor already in it"?


As soon as you plug the device to power, it configures itself as a nios
processor. this is also confirmed by the nios manual which comes with
the board.

>
> If so, then the FPGA configuration is controlled by a small CPLD. When the
> board boots up I think this looks for the presence of several images in flash,
> picks one then configures the FPGA.
>


This seems like what's happening. the safe mode led is on, btw.

> There's a line from the FPGA to this config controller, called reconfigreq_n
> which allows a Nios to cause the FPGA to be re-configured. If you don't
> drive this inactive then as soon as your design boots up the FPGA will go
> through a re-configuration and one of the valid Nios images will be loaded.
>
>
> >> If so then the config prom has a line from the FPGA, reconfig_req, that
> >> allows any Nios to request a reconfiguration. You need to set this
> >> permanently high (and assign it to the correct pin).

> >
> > How do I do that? is it a jumper or a Quartus setting or what?

>
> You need to add an output to your design (call it anything you want), set it high
> and assign it to the correct pin. On the CycloneII board with the EP2C35 it's
> pin AA14.
>


I am using a Cyclone EP1C20 chip and not EP2C35 and I couldn't find
where the reconfig_req is located in it. i have the pin list for that
device, but I must say that I am not familiar with most of the acronyms
used there. the previous device I used to work with was a Flex10k and
it was way lot simpler to locate what I needed there.
could you help me with the pin number that should be driven high in my
design?

>
> Nial
>
>
> ----------------------------------------------------------
> Nial Stewart Developments Ltd Tel: +44 131 561 6291
> 42/2 Hardengreen Business Park Fax: +44 131 561 6327
> Dalkeith, Midlothian
> EH22 3NU
> www.nialstewartdevelopments.co.uk


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  #7 (permalink)  
Old 05-26-2006, 04:41 PM
Nial Stewart
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Posts: n/a
Default Re: problem programming Altera Cyclone device

>> What did you mean by "which comes with the NiosII processor already in it"?
> As soon as you plug the device to power, it configures itself as a nios
> processor. this is also confirmed by the nios manual which comes with
> the board.
>> If so, then the FPGA configuration is controlled by a small CPLD. When the
>> board boots up I think this looks for the presence of several images in flash,
>> picks one then configures the FPGA.

> This seems like what's happening. the safe mode led is on, btw.


>> You need to add an output to your design (call it anything you want), set it high
>> and assign it to the correct pin. On the CycloneII board with the EP2C35 it's
>> pin AA14.
>>

> I am using a Cyclone EP1C20 chip and not EP2C35 and I couldn't find
> where the reconfig_req is located in it. i have the pin list for that
> device, but I must say that I am not familiar with most of the acronyms
> used there. the previous device I used to work with was a Flex10k and
> it was way lot simpler to locate what I needed there.
> could you help me with the pin number that should be driven high in my
> design?



There's no FPGA pin called reconfigreq_n, it's a net on the board that goes
from the FPGA to the config device.

From the Cyclone schematics I've got on this PC with the EP1C20 it might
be connected to pin V8.


Nial.


----------------------------------------------------------
Nial Stewart Developments Ltd Tel: +44 131 561 6291
42/2 Hardengreen Business Park Fax: +44 131 561 6327
Dalkeith, Midlothian
EH22 3NU
www.nialstewartdevelopments.co.uk


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  #8 (permalink)  
Old 05-26-2006, 05:19 PM
Hans
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Posts: n/a
Default Re: problem programming Altera Cyclone device


"Nial Stewart" <[email protected]> wrote in message
news:[email protected]

>
>
> There's no FPGA pin called reconfigreq_n, it's a net on the board that
> goes
> from the FPGA to the config device.
>
> From the Cyclone schematics I've got on this PC with the EP1C20 it might
> be connected to pin V8.
>


Correct,

pld_reconfigreq_n <='1';

Quartus <design>.csv file:

pld_reconfigreq_n,PIN_V8,4,LVTTL,Column I/O,LVDS119p,,,,,

Hans
www.ht-lab.com


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  #9 (permalink)  
Old 05-27-2006, 01:59 PM
Roi
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Default Re: problem programming Altera Cyclone device

Worked like a charm!

Thank you all for your help!!

Roi

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