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  #1 (permalink)  
Old 12-19-2006, 05:22 PM
Ndf
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Default PLL minimum input clock frequency

Hello all,



I would like to multiply by 4 a USB chip 12MHz clock. The phase shift is not
important.

I cannot use LatticeXP PLL because minimum input clock frequency is 25MHz.

There is a way to work around this problem? I would like to save space and
money avoiding an external oscillator.



Thanks,

Dan.


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  #2 (permalink)  
Old 12-19-2006, 06:59 PM
Gabor
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Default Re: PLL minimum input clock frequency


Ndf wrote:
> Hello all,
>
>
>
> I would like to multiply by 4 a USB chip 12MHz clock. The phase shift is not
> important.
>
> I cannot use LatticeXP PLL because minimum input clock frequency is 25MHz.
>
> There is a way to work around this problem? I would like to save space and
> money avoiding an external oscillator.
>
>
>
> Thanks,
>
> Dan.


I see two possibilities:

1) Cheat a little bit (assume that 24 MHz works in most cases) and
double the clock input using LUT delays (and hope it's close enough
to 50% duty cycle for this to work).

2) Add an external PLL frequency multiplier chip. ICS has some small
(8-pin SOIC) cheap (cheaper than a crystal oscillator) parts that work
at this frequency. ICS570B comes to mind...

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  #3 (permalink)  
Old 12-20-2006, 10:24 AM
Symon
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Default Re: PLL minimum input clock frequency

"Gabor" <[email protected]> wrote in message
news:[email protected] ups.com...
> Ndf wrote:
>> Hello all,
>>
>> I would like to multiply by 4 a USB chip 12MHz clock. The phase shift is
>> not
>> important.
>>
>> I cannot use LatticeXP PLL because minimum input clock frequency is
>> 25MHz.
>>
>> There is a way to work around this problem? I would like to save space
>> and
>> money avoiding an external oscillator.
>>
>> Thanks,
>> Dan.

>
> I see two possibilities:
>
> 1) Cheat a little bit (assume that 24 MHz works in most cases) and
> double the clock input using LUT delays (and hope it's close enough
> to 50% duty cycle for this to work).
>
> 2) Add an external PLL frequency multiplier chip. ICS has some small
> (8-pin SOIC) cheap (cheaper than a crystal oscillator) parts that work
> at this frequency. ICS570B comes to mind...


Hi Dan,
Gabor's blinkered ideas would work. However, they're not as much fun as
accelerating the LatticeXP PLL to about 0.8773 of the speed of light. If you
do that, the stationary oscillator appears to the PLL to be going at 25MHz.
IME, this method involves messing around with enormous gravitational fields
at event horizons, so watch out for evil red robots.
HTH, Syms.


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  #4 (permalink)  
Old 12-20-2006, 02:58 PM
Ndf
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Posts: n/a
Default Re: PLL minimum input clock frequency

> Hi Dan,
> Gabor's blinkered ideas would work. However, they're not as much fun as
> accelerating the LatticeXP PLL to about 0.8773 of the speed of light. If

you
> do that, the stationary oscillator appears to the PLL to be going at

25MHz.
> IME, this method involves messing around with enormous gravitational

fields
> at event horizons, so watch out for evil red robots.
> HTH, Syms.
>


Thanks,

Unfortunately I'm not implicated on astrophysical research but I'll keep
that on mind.

Dan.




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  #5 (permalink)  
Old 12-21-2006, 08:54 PM
Guest
 
Posts: n/a
Default Re: PLL minimum input clock frequency

Just use a crystal or resonator, not an oscillator. They are small and
under a buck in small quantities. Use the Lattice to provide the gain
and 180 degree phase shift required to sustain oscillation.

Jay

Ndf wrote:
> Hello all,
>
>
>
> I would like to multiply by 4 a USB chip 12MHz clock. The phase shift is not
> important.
>
> I cannot use LatticeXP PLL because minimum input clock frequency is 25MHz.
>
> There is a way to work around this problem? I would like to save space and
> money avoiding an external oscillator.
>
>
>
> Thanks,
>
> Dan.


Reply With Quote
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