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  #1 (permalink)  
Old 04-13-2006, 11:20 AM
maxascent
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Default PCB Stack

Hi

I am designing a PCB with a Virtex II Pro and some DDR memory so need t
use a controlled impedance board. I am going to use an 8 layer board. M
question is do I need to specify to the PCB manufacturer the variou
thickness of each layer and the gaps or is there a standard that they wil
use.

Cheers

Jon


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  #2 (permalink)  
Old 04-13-2006, 11:38 AM
KJ
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Default Re: PCB Stack

'Controlled impedance' means just that, you (the engineer) specify the
stackup so that the impedance meets the requirements for your design.
Leaving it to the PCB manufacturer means that you're not controlling it but
willing to accept whatever they may happen to make.

KJ

"maxascent" <[email protected]> wrote in message
news:[email protected]
> Hi
>
> I am designing a PCB with a Virtex II Pro and some DDR memory so need to
> use a controlled impedance board. I am going to use an 8 layer board. My
> question is do I need to specify to the PCB manufacturer the various
> thickness of each layer and the gaps or is there a standard that they will
> use.
>
> Cheers
>
> Jon
>
>



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  #3 (permalink)  
Old 04-13-2006, 01:20 PM
maxascent
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Posts: n/a
Default Re: PCB Stack

I understand what you are saying but is there any industry standard value
that are used. If I were to use these then I can adjust my track size t
get the impedance I need.

Cheers

Jon
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  #4 (permalink)  
Old 04-13-2006, 01:22 PM
Joseph Samson
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Default Re: PCB Stack

maxascent wrote:
> Hi
>
> I am designing a PCB with a Virtex II Pro and some DDR memory so need to
> use a controlled impedance board. I am going to use an 8 layer board. My
> question is do I need to specify to the PCB manufacturer the various
> thickness of each layer and the gaps or is there a standard that they will
> use.

Contact the PCB manufacturer and tell them the stackup (for example,
signal, GND, 3.3V, signal), tell them the impedance that you want and
have them tell you the design rules (for example, 5 mil lines and 5 mil
spaces). Controlled impedance is a combination of line width and
spacing, dielectric thickness and dielectric constant. The board
manufacturer knows what dielectrics are available to them, so they can
advise what rules to use for their dielectrics.

---
Joe Samson
Pixel Velocity
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  #5 (permalink)  
Old 04-13-2006, 02:08 PM
Rene Tschaggelar
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Default Re: PCB Stack

maxascent wrote:

> I understand what you are saying but is there any industry standard values
> that are used. If I were to use these then I can adjust my track size to
> get the impedance I need.


Yes, ask your manufacturer.

Rene
--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
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  #6 (permalink)  
Old 04-13-2006, 02:36 PM
John_H
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Default Re: PCB Stack

maxascent wrote:

> Hi
>
> I am designing a PCB with a Virtex II Pro and some DDR memory so need to
> use a controlled impedance board. I am going to use an 8 layer board. My
> question is do I need to specify to the PCB manufacturer the various
> thickness of each layer and the gaps or is there a standard that they will
> use.
>
> Cheers
>
> Jon


Our typical flow is:
1) propose stackup,
2) ask vendor for comments,
3) if it's not laughable results from the new guy, evaluate the
vendor's tweaks to the stackup,
4) lay out with the requisite line widths.

There is no standard, only required dielectric thicknesses for your line
widths or vice-versa. If you specify impedances, they will tweak the
line widths for the dielectrics they use by adding test coupons for TDR
measurements to guarantee production within your tolerance.
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  #7 (permalink)  
Old 04-13-2006, 07:59 PM
MM
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Default Re: PCB Stack

"KJ" <[email protected]> wrote in message
news:lSp%[email protected] net...
> 'Controlled impedance' means just that, you (the engineer) specify the
> stackup so that the impedance meets the requirements for your design.
> Leaving it to the PCB manufacturer means that you're not controlling it

but
> willing to accept whatever they may happen to make.
>


In most cases board manufacturers have much better abilities to control
impedance than board designers. I usually would run Polar impedance
calculator to make sure my design is feasible but would leave actual precise
control to the board house. In some cases where it matters (RF) I would add
some extra constraints such as, for example, dielectric thickness should be
at least 10 mil. The line widths don't have to be exact in the design. The
board house will fix them. Interestingly, our board house doesn't charge
extra if they need to decrease the line width to below 4 mil for the
impedance control purposes, but they do charge if the lines are below 4 mil
in the original design!

/Mikhail


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  #8 (permalink)  
Old 04-13-2006, 08:29 PM
MM
Guest
 
Posts: n/a
Default Re: PCB Stack

"maxascent" <[email protected]> wrote in message
news:[email protected]
> Hi
>
> I am designing a PCB with a Virtex II Pro and some DDR memory so need to
> use a controlled impedance board. I am going to use an 8 layer board. My
> question is do I need to specify to the PCB manufacturer the various
> thickness of each layer and the gaps or is there a standard that they will
> use.


There is no standard, but most of the boards use FR4 material with the
dielectric constant of about 4.3. It works out that a 5 mil track with 5 mil
separation from a plane (assuming the second plane is at least 15 mil away)
gives you approximately 50 Ohm impedance.

How many layers of your stackup are planes? Generally speaking a 8-layer
board is not very convenient for impedance control. To make it easy you need
to have planes next to your top and bottom layers as well as the planes
separating each two internal signal layers. Consider 10 layers instead:

1. Top
2. Plane
3. In1
4. In2
5. Plane
6. Plane
7. In3
8. In4
9. Plane
10. Bottom

Note that there is an issue of copper balance, i.e. the stackup needs to be
symmetrical to prevent board warpage.

/Mikhail













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  #9 (permalink)  
Old 04-13-2006, 10:07 PM
KJ
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Posts: n/a
Default Re: PCB Stack


"maxascent" <[email protected]> wrote in message
news:[email protected]
>I understand what you are saying but is there any industry standard values
> that are used. If I were to use these then I can adjust my track size to
> get the impedance I need.
>


Not really, it's up to you to work out the details but they're not terribly
difficult to work out then you'll find that in many cases you'll carry over
what you did to your next design since it worked so good for you last time.
Some of the constraints you'll have are:

1. Overall board thickness. If you have any through hole components
(connectors now a days can be about it but don't overlook it or you'll find
some part where the leads won't go all the way through and won't get
properly soldered). .062, .093 and .125" are some common thicknesses that
are driven by the lead length of 'typical' industry parts.

2. Available dielectric materials to use and their thicknesses. Unless
you're doing something exotic the material is likely FR4. Check with PCB
suppliers for some common thicknesses that they have and their line
thickness/spacing constraints.

3. Balanced stackup. Whether you work your way from top to bottom or bottom
to top the layers that are power/ground planes need to be symmetrical.
(i.e. Top, Plane, Plane, Bottom is the simple case for a 4 layer board). As
you work your way in, the thicknesses of the layers need to be symmetric as
well.

4. If every layer needs to have controlled impedance then adjacent to each
and every signal layer must be a power/ground plane layer. Some examples: 10
layers would be (Top, Plane, Sig, Sig, Plane, Plane, Sig, Sig, Plane,
Bottom). 12 layers would be (Top, Plane, Sig, Sig, Plane, Sig, Sig, Plane,
Sig, Sig, Plane, Bottom). You'll find that you'll have some difficulty
working out an 8 layer arrangement so if it has to be 8 you'll need to make
some tradeoffs.

5. Minimum required line and trace widths that you need to actually route
the board. Except for power or other high current nets you'll likely be
better off making everything the same line width and be done with it (but
again, different applications have their exceptions).

6. Impedance control. For digital applications 'many' times you don't so
much care what the actual impedance is just that it doesn't vary from layer
to layer since odds are you won't be able to route everything on one layer.
If that's the situation then you may want to work out a target impedance to
shoot for and a layer to layer difference that must be met. As an example,
maybe you spec that you want the impedance of each signal layer to be 55+/-
5 ohms. That allows the supplier a relatively wide window to shoot for.
But you also want to constrain them so that you don't have Sig1 = 50 ohms,
Sig2 = 60 ohms so you need to have an additional spec that says what the
largest layer to layer impedance differential you're willing to tolerate
will be (2 ohms maybe). The supplier really won't have much trouble meeting
this spec since it will likely require them to use the same material and
thickness for most of the layers. What will make it difficult is the actual
impedance of a layer is important and you can't trade off either overall
board thickness or trace width. Working out the math to figure out a rough
cut at the impedance and stackup ahead of time will help, if not work with
the supplier and talk through what your requirements are and they can pop
out a stackup for you in nothing flat since that's they're business.

The PCB supplier is generally keenly interested in nailing #1, 2 and 3 to
minimize their cost and come up with something that they can fabricate
economically so you can expect them to help you get those right. #4, 5 and
6 though generally don't impact their costs directly they really are
constraints that they need to be able to meet so you need to be the one
driving them to make sure that the stackup meets your product requirements
in those areas.

KJ


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  #10 (permalink)  
Old 04-14-2006, 11:27 AM
maxascent
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Posts: n/a
Default Re: PCB Stack

Thanks all for the advice. Regarding my stack I was planning to do this :-

Top
Gnd
Power
Mid1
Mid2
Power
Gnd
Bottom

Does the above seem sensible or would it be better to use 10 layers?

Cheers

Jon
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  #11 (permalink)  
Old 04-14-2006, 11:50 AM
Kolja Sulimma
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Posts: n/a
Default Re: PCB Stack

maxascent schrieb:
> Thanks all for the advice. Regarding my stack I was planning to do this :-
>
> Top
> Gnd
> Power
> Mid1
> Mid2
> Power
> Gnd
> Bottom


As you are likely to have more than two power supply voltages you should
substitute one of the ground planes by another power plane. For
impedance control it does not matter what the electrical potential of
the plane is.

Kolja Sulimma
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  #12 (permalink)  
Old 04-14-2006, 02:24 PM
John_H
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Posts: n/a
Default Re: PCB Stack

maxascent wrote:
> Thanks all for the advice. Regarding my stack I was planning to do this :-
>
> Top
> Gnd
> Power
> Mid1
> Mid2
> Power
> Gnd
> Bottom
>
> Does the above seem sensible or would it be better to use 10 layers?
>
> Cheers
>
> Jon


Personally, I like your stackup. Having chopped-up power planes is fine
as long as certain precautions are taken:

Make sure the power islands aren't fed over tiny tracks
Place adequate decoupling on the power islands
Have adequate decoupling caps near plane splits
(to provide a decent return current path)

Every time a signal changes layers, there's a chance to introduce
crosstalk through common return paths. A sprinkling of decoupling caps
and/or ground/ground connections helps reduce the current loops that can
make EMI/EMC nasty in addition to the crosstalk issues.
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  #13 (permalink)  
Old 04-14-2006, 05:47 PM
Guest
 
Posts: n/a
Default Re: PCB Stack

1 GND plane in an 8-layer stack? I was under the belief that yes, a
power plane can serve as a return path for a signal, but it's not
preferred or equal over a GND plane. I would think partitioning the
power planes is a safer bet than cutting another GND layer.

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  #14 (permalink)  
Old 04-14-2006, 09:15 PM
KJ
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Default Re: PCB Stack

The stackup you have looks good but are 3+ routing layers going to be
sufficient? Technically you have 4 but for a surface mount board the
top surface is so cluttered with parts that it turns out to not be
something that you can actually route a lot on unless there is a lot of
nice patterning to how the parts happen to have to be connected.

One thing left out is probably the MOST important consideration from an
EMI perspective. If you have chopped up planes make sure that NO
signal crosses that split unless it has been adequately filtered. Keep
in mind that if the chopped up plane is providing the AC return path
that when it encounters a plane split that you've just made yourself a
huge loop that will radiate and distort whatever signal you're trying
to send across it...so it best not be any sort of periodic signal or
anything of importance.

If you do have to jump the gap, bridge it with as large of a resistor
as possible that still allows your circuit to function...and that's
only after you've exhausted all ways to avoid having a signal cross the
gap in the first place.

KJ

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  #15 (permalink)  
Old 04-15-2006, 09:28 AM
Guest
 
Posts: n/a
Default Re: PCB Stack

I personally don't like this stackup because you have designated your
Top and Bottom layers to be your high-speed layers; ie, the layers
adjacent to GND planes being the best. I would move the high speed
layers to the inside instead of your outer two, or even separate teh
power and GND planes. I have used Alternating Power and GND and it
worked quite well. I do hear that Coupling the planes is good for some
capacitive-related reasons however, so I can't comment on that..

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  #16 (permalink)  
Old 04-15-2006, 10:35 AM
Kolja Sulimma
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Posts: n/a
Default Re: PCB Stack

[email protected] schrieb:
> 1 GND plane in an 8-layer stack? I was under the belief that yes, a
> power plane can serve as a return path for a signal, but it's not
> preferred or equal over a GND plane. I would think partitioning the
> power planes is a safer bet than cutting another GND layer.

Nope.

As a power supply for a high speed circuit you need a low inductance
power supply. A CMOS circuit is completly symmetric between VCC and GND.
The magnitude of electrical effects will depend on the maximum of the
VCC and GND inductance.

Driving a falling output for example will make the GND plane bounce up,
driving a rising output will make the VCC blane bounce down. Both
changes the input threshold voltage by the same magnitude introducing
jitter and reducing the noise margin.

Therefore design all supplies for the same inductance. The only
difference is that GND usually is common for the whole board, whereas
sometimes certain power supply voltages are only need in some areas of
the board so that you can have one plane in one half of the board and
another in the other half.

Islands are possible but very dangerous. Remember that you can not have
a high speed signal cross the island boundary on the adjacent routing
layer. Haveing a seprate layer for each supply therefore simplifies
routing a lot.

Also consider microvias. They save a lot of area, are great for signal
integrity and do not cost much extra.

Kolja Sulimma

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