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  #1 (permalink)  
Old 11-21-2007, 08:30 AM
G_Abg
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Default partial dynamic reconfiguration on Virtex-4 SX35

Hi,

I have just begin my PhD on SDR and I will have to use a FPGA with
partial dynamic reconfiguration. The system which interest me have a
Xilinx Virtex-4 SX35 integrated on it and I'm not sure this FPGA can
do it.

If someone could answer me, it'll be great.

Thanks.
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  #2 (permalink)  
Old 11-21-2007, 01:54 PM
rickman
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Default Re: partial dynamic reconfiguration on Virtex-4 SX35

On Nov 21, 3:30 am, G_Abg <[email protected]> wrote:
> Hi,
>
> I have just begin my PhD on SDR and I will have to use a FPGA with
> partial dynamic reconfiguration. The system which interest me have a
> Xilinx Virtex-4 SX35 integrated on it and I'm not sure this FPGA can
> do it.
>
> If someone could answer me, it'll be great.


I haven't looked at the Virtex-4 devices in detail, but Xilinx has
included partial dynamic reconfiguration in their parts for several
generations now. The trick is that they don't support this in
software... at least very well. PDC sounds good on paper, but seems
to be hard to implement and clearly there is not much demand for it.

I'm curious, what is SDR and why are you working on it?
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  #3 (permalink)  
Old 11-21-2007, 04:45 PM
austin
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Default Re: partial dynamic reconfiguration on Virtex-4 SX35

G_Abg,

Yes, all V4 (and V5) parts are supported through the PlanAhead(tm)
software tool for partial reconfiguration.

I suggest you ask your professor to request the PlanAhead software so
that you may do what you need to.

http://www.xilinx.com/ise/optional_prod/planahead.htm

The partial reconfiguration flow still has some "bumps" in it (even with
the latest tools), but it now comes down to a steady improvement as we
find and fix bugs, and add features (as we discover what customers
really need).

http://www.xilinx.com/prs_rls/ip/02165sdr_forum.htm

Austin
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  #4 (permalink)  
Old 11-21-2007, 05:43 PM
G_Abg
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Default Re: partial dynamic reconfiguration on Virtex-4 SX35

On 21 nov, 14:54, rickman <[email protected]> wrote:
> On Nov 21, 3:30 am, G_Abg <[email protected]> wrote:
>
> > Hi,

>
> > I have just begin my PhD on SDR and I will have to use a FPGA with
> > partial dynamic reconfiguration. The system which interest me have a
> > Xilinx Virtex-4 SX35 integrated on it and I'm not sure this FPGA can
> > do it.

>
> > If someone could answer me, it'll be great.

>
> I haven't looked at the Virtex-4 devices in detail, but Xilinx has
> included partial dynamic reconfiguration in their parts for several
> generations now. The trick is that they don't support this in
> software... at least very well. PDC sounds good on paper, but seems
> to be hard to implement and clearly there is not much demand for it.
>
> I'm curious, what is SDR and why are you working on it?


SDR is for Software Defined Radio. I'm sorry but I'm not enough good
in english to explain you what it consists of, I let you find it by
yourself. (Perhaps one day my english will be sufficient to do that
^^)

About why I am working on it, it's very simple, I find this subject
very interesting and mostly because I think it will open me good job
opportunities after my PhD.

If you want more information about this subject, I could find some
articles for you.
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  #5 (permalink)  
Old 11-21-2007, 05:49 PM
G_Abg
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Posts: n/a
Default Re: partial dynamic reconfiguration on Virtex-4 SX35

On 21 nov, 17:45, austin <[email protected]> wrote:
> G_Abg,
>
> Yes, all V4 (and V5) parts are supported through the PlanAhead(tm)
> software tool for partial reconfiguration.
>
> I suggest you ask your professor to request the PlanAhead software so
> that you may do what you need to.
>
> http://www.xilinx.com/ise/optional_prod/planahead.htm
>
> The partial reconfiguration flow still has some "bumps" in it (even with
> the latest tools), but it now comes down to a steady improvement as we
> find and fix bugs, and add features (as we discover what customers
> really need).
>
> http://www.xilinx.com/prs_rls/ip/02165sdr_forum.htm
>
> Austin


Thank you for your answer and for the links. I will look at it rigth
now.
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  #6 (permalink)  
Old 11-21-2007, 06:27 PM
rickman
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Posts: n/a
Default Re: partial dynamic reconfiguration on Virtex-4 SX35

On Nov 21, 12:43 pm, G_Abg <[email protected]> wrote:
> On 21 nov, 14:54, rickman <[email protected]> wrote:
>
>
>
> > On Nov 21, 3:30 am, G_Abg <[email protected]> wrote:

>
> > > Hi,

>
> > > I have just begin my PhD on SDR and I will have to use a FPGA with
> > > partial dynamic reconfiguration. The system which interest me have a
> > > Xilinx Virtex-4 SX35 integrated on it and I'm not sure this FPGA can
> > > do it.

>
> > > If someone could answer me, it'll be great.

>
> > I haven't looked at the Virtex-4 devices in detail, but Xilinx has
> > included partial dynamic reconfiguration in their parts for several
> > generations now. The trick is that they don't support this in
> > software... at least very well. PDC sounds good on paper, but seems
> > to be hard to implement and clearly there is not much demand for it.

>
> > I'm curious, what is SDR and why are you working on it?

>
> SDR is for Software Defined Radio. I'm sorry but I'm not enough good
> in english to explain you what it consists of, I let you find it by
> yourself. (Perhaps one day my english will be sufficient to do that
> ^^)


It is not an English problem, it is an abbreviation problem. We use
so many of them that they become context dependent jargon that even
people who work in the field don't always know what you are talking
about.

I am very familiar with SDR, both the generic usage and the version
defined by the US government which is a particular implementation.


> About why I am working on it, it's very simple, I find this subject
> very interesting and mostly because I think it will open me good job
> opportunities after my PhD.
>
> If you want more information about this subject, I could find some
> articles for you.


Thanks, but I have been up to my ears in the topic. Yes, it should
provide you with good job opportunities over a long span as more and
more SDR related application open up constantly.
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  #7 (permalink)  
Old 11-22-2007, 10:17 AM
mh
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Posts: n/a
Default Re: partial dynamic reconfiguration on Virtex-4 SX35

On Nov 21, 11:27 pm, rickman <[email protected]> wrote:
> On Nov 21, 12:43 pm, G_Abg <[email protected]> wrote:
>
>
>
>
>
> > On 21 nov, 14:54, rickman <[email protected]> wrote:

>
> > > On Nov 21, 3:30 am, G_Abg <[email protected]> wrote:

>
> > > > Hi,

>
> > > > I have just begin my PhD on SDR and I will have to use a FPGA with
> > > > partial dynamic reconfiguration. The system which interest me have a
> > > > Xilinx Virtex-4 SX35 integrated on it and I'm not sure this FPGA can
> > > > do it.

>
> > > > If someone could answer me, it'll be great.

>
> > > I haven't looked at the Virtex-4 devices in detail, but Xilinx has
> > > included partial dynamic reconfiguration in their parts for several
> > > generations now. The trick is that they don't support this in
> > > software... at least very well. PDC sounds good on paper, but seems
> > > to be hard to implement and clearly there is not much demand for it.

>
> > > I'm curious, what is SDR and why are you working on it?

>
> > SDR is for Software Defined Radio. I'm sorry but I'm not enough good
> > in english to explain you what it consists of, I let you find it by
> > yourself. (Perhaps one day my english will be sufficient to do that
> > ^^)

>
> It is not an English problem, it is an abbreviation problem. We use
> so many of them that they become context dependent jargon that even
> people who work in the field don't always know what you are talking
> about.
>
> I am very familiar with SDR, both the generic usage and the version
> defined by the US government which is a particular implementation.
>
> > About why I am working on it, it's very simple, I find this subject
> > very interesting and mostly because I think it will open me good job
> > opportunities after my PhD.

>
> > If you want more information about this subject, I could find some
> > articles for you.

>
> Thanks, but I have been up to my ears in the topic. Yes, it should
> provide you with good job opportunities over a long span as more and
> more SDR related application open up constantly.- Hide quoted text -
>
> - Show quoted text -




Hi
I suggest you to perform extensive literature survey and visit mailing
list at university of Queensland, Australia. They guys are doing a
wonderful work in dynamic reconfiguration. Although Xilinx Jbits tool
is rather obsolete now but playing with the tool can give a very good
insight to FPGA for reconfiguration and then I would suggest you start
working with EDK, PlanAhead and ISE for final application.

Best of luck for your research.

/MH
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