FPGA Central

Hello all,

I am making a PCI add-in card using a Xilinx Spartan II device
which provides IOB configurations for nearly all PCI signals.
The implemented agent is also supposed to generate PCI interrupts
which, electrically, are Open Drain/Open Collector outputs for
which I could not find an appropriate IOB configuration.

Is anyone out there successfully generating PCI interrupt signals
with a Spartan II and willing to let me in on the secret IOB config ?
Am I missing something obvious here ?


Thanks and regards,
Christian Boehme

On Mon, 06 Sep 2004 23:50:03 +0200, "Christian E. Boehme" <[email protected]> wrote:
>Hello all,
>
>I am making a PCI add-in card using a Xilinx Spartan II device
>which provides IOB configurations for nearly all PCI signals.
>The implemented agent is also supposed to generate PCI interrupts
>which, electrically, are Open Drain/Open Collector outputs for
>which I could not find an appropriate IOB configuration.
>
>Is anyone out there successfully generating PCI interrupt signals
>with a Spartan II and willing to let me in on the secret IOB config ?
>Am I missing something obvious here ?

It's obvious, after someone tells you the solution.

Open Collector (TTL terminology) / Open Drain (CMOS terminology)
Has the following characteristics:

Drives Low for logic low, typically for a signal that is asserted low.
This allows multiple drivers on the same line, and the effect is wired
OR of the asserted signal sources.

Does not drive high for logic high, which for a signal that is asserted
Low, means that the signal is de-asserted.

Requires a pull-up resistor to establish logic high.

The output buffers of the Xilinx FPGAs can be configured for tri-state
control. Drive high, Drive low, and don't drive. The "don't drive"
state is generated by having a logic high on the tristate control
pin of the output buffer. If this signal is low, then the output is
driven, and the drive level depends on the other internal signal
that goes to the output driver.

Physical output pin is named "O", the tri-state control is named "T",
and the pin that has the signal from the guts of the chip that you
want to send out is called "I". Look in the online docs at OBUFT.

When am I ever going to answer you??? Now.

Solution 1.

Connect "I" to ground, and connect your interrupt signal to "T".
The O pin will have the desired behavior. When T is high, O is
tri-stated, and either some other driver pulls the line low, or
the pull up resistor pulls the line high.

Solution 2.

Connect your interrupt signal to both I and T. The O pin
will still do what you want.

Note: Do not use the on-chip pull-up resistor to establish your
logic high. Use an external resistor (probably in the rang 1K to 5K)
for the pull-up. Why? because the on-chip pull-up has too high a
resistance.

>Thanks and regards,
>Christian Boehme

You are welcome.

Philip


Philip Freidin
Fliptronics

Philip Freidin wrote:

> The output buffers of the Xilinx FPGAs can be configured for tri-state
> control. Drive high, Drive low, and don't drive. The "don't drive"
> state is generated by having a logic high on the tristate control
> pin of the output buffer. If this signal is low, then the output is
> driven, and the drive level depends on the other internal signal
> that goes to the output driver.

This is what a typical TS output does. No problem here. The problem
arises with the PCI outputs configured as LVTTL TP outputs which, at
least historically, were the very reason OC outputs were introduced
because the latter would enable the designer to connect outputs in
parallel without sinking huge currents (from another high driven TP
driver for example). In the PCI case, the additional sink current
(coming from the pull-up resistor) cannot be predicted since it's
an implementation detail of the host system.

> Connect "I" to ground, and connect your interrupt signal to "T".
> The O pin will have the desired behavior. When T is high, O is
> tri-stated, and either some other driver pulls the line low, or
> the pull up resistor pulls the line high.

So, are you suggesting to employ a TS TP output as OC output ?

> Note: Do not use the on-chip pull-up resistor to establish your
> logic high. Use an external resistor (probably in the rang 1K to 5K)
> for the pull-up. Why? because the on-chip pull-up has too high a
> resistance.

Fiddling with the pull-up resistors is what basically would violate
the PCI spec since it is the responsibility of the system board designer
to apply these. Actually not my cup-o-tea this one


Cheers,
Chris

Christian E. Boehme wrote:

> The problem arises with the PCI outputs configured as LVTTL TP outputs

Forget about that ;-) The outputs are configured as PP buffers so
your suggestion makes sense. It still looks a bit hack-ish, though


Cheers,
Chris

On Thu, 09 Sep 2004 03:27:06 +0200, "Christian E. Boehme" <[email protected]> wrote:
>Christian E. Boehme wrote:
>
>> The problem arises with the PCI outputs configured as LVTTL TP outputs
>
>Forget about that ;-) The outputs are configured as PP buffers so
>your suggestion makes sense. It still looks a bit hack-ish, though
>Chris

I would like to reply, but I don't know what you mean by "TP outputs",
and "PP buffers". Please stick to standard terms.

Philip


Philip Freidin
Fliptronics