FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 09-23-2005, 07:40 PM
Antonio Pasini
Guest
 
Posts: n/a
Default ML403 dcm phase shift reference design... anyone has a copy ?

I'm trying to play with the OPB MCH DDR controller (multichannel ddr
controller) on Microblaze platform, on S3.

Unfortunately, I have no example to start with. Even on Xilinx site I found
not so much help.

I saw on the ML403 user guide that with that board comes an example:

reference_systems/EDK_projects/ml403_dcm_phase_shift

that seems to fit. Even if the ML403 is Virtex 4-FX based, this design uses
a Microblaze.

I don't really know if asking for a copy of this to some kind people is a
copyright violation; I own a full license of EDK, ISE, and a Memec demo
board, but no really useful examples to start. I'm just asking for a little
help to make me purchase more chips, sooner :-)

I would prefer not to have to purchase the V4-FX board, because my design
will be S3 based, and my board already has DDR.

Can anyone help ?

Meanwhile, I'll ask my FAE, but with the Memec / Avnet fusion still to
settle, now it's not a good period to ask for help...




Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
problems with Xilinx GSRD design for ML403 leevv FPGA 0 06-23-2005 01:17 AM
Variable phase shift on Spartan3 DCMs. Does it work? Ray Andraka FPGA 8 02-11-2005 08:00 PM
digital phase shift using synchronous design Sachin Chandra Verilog 1 01-11-2004 07:24 PM
OFFSET OUT with phase shift in DCM Sam Duncan FPGA 0 12-03-2003 10:32 AM


All times are GMT +1. The time now is 11:41 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2024, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved