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Old 02-25-2005, 08:03 AM
stella
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Default Ml310(xc2vp30) with ppc 405,multi processor share memory?

Hello,everyone
I am doing my thesis on the ML310 board..it's so hard.
Lots,lots of pdf for reading.. :!:

My first target is transfer data between processors using the FPG
Block-SelectRAM (BRAM).

1.-----Prove data flow between the processors (from processor A t
processor B and vice versa)

After BSB, I open up the PBD file, see that the two ppcs have alread
connected with brams..plbs..ocm-ctrl.

But how could I prove the data flow.. Shall I write a short C tes
program in EDK, and saw the result with hyper terminal? or shall
write a vhdl program to see the result with modelsim..

confusing..

2.-----If possible make also use of the Rocket-IO (MGT)
why should I use the rocket-IO..is that the same procedure to prov
the data flow with rocket I/O as with Brams...

Great appreciate your help!!!!!!!!! :

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Old 02-25-2005, 08:30 AM
Wing Fong Wong
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Default Re: Ml310(xc2vp30) with ppc 405,multi processor share memory?

stella <[email protected]> wrote:
> Hello,everyone.
> I am doing my thesis on the ML310 board..it's so hard..
> Lots,lots of pdf for reading.. :!:
>

Me too! I'm also using that same board. Sorry but I don't really have
anything useful to add other than I sympathise with you.

--

Wing Wong.
Webpage: http://wing.ucc.asn.au
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  #3 (permalink)  
Old 02-25-2005, 11:08 AM
Nju Njoroge
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Default Re: Ml310(xc2vp30) with ppc 405,multi processor share memory?

stella wrote:
> Hello,everyone.
> I am doing my thesis on the ML310 board..it's so hard..
> Lots,lots of pdf for reading.. :!:
>
> My first target is transfer data between processors using the FPGA
> Block-SelectRAM (BRAM).
>
> 1.-----Prove data flow between the processors (from processor A to
> processor B and vice versa).
>
> After BSB, I open up the PBD file, see that the two ppcs have already
> connected with brams..plbs..ocm-ctrl..
>
> But how could I prove the data flow.. Shall I write a short C test
> program in EDK, and saw the result with hyper terminal? or shall I
> write a vhdl program to see the result with modelsim...
>
> confusing...
>
> 2.-----If possible make also use of the Rocket-IO (MGT).
> why should I use the rocket-IO..is that the same procedure to prove
> the data flow with rocket I/O as with Brams....
>
>
> Great appreciate your help!!!!!!!!!

I have done something like this in the past on a ML310 board. I'd go
with option #1. I would write a simple C program. To get something
working quickly, write two versions of the simple program--one for
processor 0 and another for processor 1. You create two software
projects in XPS and have the linker script put the programs in two
different BRAM's. The shared data must be in the same BRAM obviously.

Sample Program
-----------------
-Processor 0 writes to location x with value y. Meanwhile, Processor 1
is in a while loop reading location x. If mem[x] == y, then Processor 1
writes mem[x] <= z.
-After processor 0 wrote mem[x] <= y, it sits in a while loop until
mem[x] changes to z. At which point, processor 0 prints to Uart a happy
message.

Processor 0 cannot print the message until processor 1 changes mem[x]
to z. Likewise, processor 1 cannot change mem[x] until processor 0
changes it to y, so it proves that the sharing is working properly.

Things to watch out for:
-caches should be turned off for the region of memory that x lies in.
This is to prevent the processors from reading their own cached value.
-the PLB bus serializes reads and writes, so no read/write can
interfere with each other.

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