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-   -   Loop Optimization (http://www.fpgacentral.com/group/showthread.php?t=57802)

Roberto 02-25-2006 01:51 PM

Loop Optimization
 
Hi all!
I' using Handel-C to target hardware (a board with spartan IIE)
and i'd like to optimize this following macro (where cartelle[i][j][k] is a
ram unsigned 7 cartelle[6][3][5]) and posizioni is a ram unsigned 8
posizioni[90]).
Have you any idea?
Thanks!
--------
static macro proc Fill_position()
{
unsigned 7 n;

while(i!=6)
{
j=0;
while(j!=3)
{
k=0;
while(k!=5)
{
n = cartelle[i][j][k]-1;
par{
posizioni[n]=i@j@k;
k++;
}
}

j++;

}

i++;
}

}




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