Jitter Management
Hello,
I am a newbie and I would like some guidance. I am using Actel AGL060.
What is the typical jitter for logic done in the AGL060? What design
issues influence that jitter? What design rules to follow to minimize
jitter? What jitter can be expected in a 74AC counter for example? How
can we generate predictable jitter levels of 1, 5, 10, 15 and 20 psec
in the AGL060, assuming those are all possible? How can I use a AGL060
to improve our jitter measurement level. How do we use an external
delay to improve jitter measurement?
Your comments are appreciated.
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