FPGA Central

Hi,

Just wondering whether somebody could let me know the different
between IOB and DIFFM/DIFFS for Xilinx FPGA.

The following pin assignment constraints were specified in .ucf for
Xilinx XC2V8000 FPGA.
NET RAM1_SnWBYTE(0) LOC=AM27;
NET RAM1_SnWBYTE(1) LOC=AM26;
NET RAM1_SnWBYTE(2) LOC=AP27;
NET RAM1_SnWBYTE(3) LOC=AP26;

But I got the following error complaining about constaints for
RAM0_SnWBYTE[1] and RAM0_SnWBYTE[2]
Couldn't pass the place and route process, resolved that DIFFM
RAM0_SnWBYTE[1] is restricted such that it may not be placed in a IOB.
Couldn't pass the place and route process, resolved that DIFFM
RAM0_SnWBYTE[2] is restricted such that it may not be placed in a IOB.

Any idea why this happened?

Cheers,

-William