On Mon, 09 Jun 2008 21:02:25 +0100, Andy Botterill
<
[email protected]> wrote:
>Using verilog and ISE 10.1.
>
>I add a reg to modify the design's behaviour. It works and it works
>correctly. The change is intended to invert the carry logic for some
>op-codes.
>
>However synthesis , using XST , gives the following warning message.
>
>WARNING:Xst:646 - Signal <borrow> is assigned but never used. This
>unconnected signal will be trimmed during the optimization process.
>
>What I would like to do is to find out which lines are caing this
>warning and see if I have missed something or the synthesis tool has
>made a mistake.
>
>All sixteen op-codes assign something to borrow. Sometimes true,
>sometimes inverse and sometimes 0.
What do you do with borrow? The synthesis tool is complaining that you
don't use "borrow" not that you don't assign to it. You can store the
borrow net's value in a register and use it in later instructions.
That way it can not be optimized away. Are you sure borrow is being
used ie, it is on the right side of an assignment? Also remember that
if you're using borrow in combinational logic and it's a real inverse
of carry, as someone else already pointed out, you may not need borrow
at all. Investigate how borrow is used.