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12-25-2003, 03:56 PM
 Newhand Guest Posts: n/a
How to get first bit '0' position in certain register?

Dear all,

For certain register, say stream = 16'b1111010011111111;
the position of first bit '0' is: 8 (from LSB);
if stream = 16'b1111000100010011, then the position is 2;

what I need is to get the position.

Since it should be done in one clock cycle, combination logic in
Verilog might be a better choice.

Could anybody give me some pieces of suggestion? Thanks in advance.

Newhand
12-26-2003, 12:45 AM
 Martin Euredjian Guest Posts: n/a
Re: How to get first bit '0' position in certain register?

"Newhand" wrote:

> For certain register, say stream = 16'b1111010011111111;
> the position of first bit '0' is: 8 (from LSB);
> if stream = 16'b1111000100010011, then the position is 2;
>
> what I need is to get the position.
>
> Since it should be done in one clock cycle, combination logic in
> Verilog might be a better choice.
>
> Could anybody give me some pieces of suggestion? Thanks in advance.

Two possible approaches:

1) Priority encoder

always @(posedge CLOCK)begin
if(~A[0]) OUT <= 4'd0;
else if(~A[1]) OUT <= 4'b1;
else if(~A[2]) OUT <= 4'b2;
... // etc., etc.
end

2) Counter

The basic idea is simple: If your operating clock is slow enough, generate a
16x clock by whatever means your device allows. On every 1x clock, start a
counter at 16x and stop it when the first "0" is found.

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