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Old 01-24-2004, 02:57 PM
Kelvin @ SG
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Default How come NGDBuild derive a clk_36m_tmp/4 clock?

I am using this DCM module, It is supposed to generate a 36MHz clock,
however NGDBuild gave me this message...How do I explain this strange
behavior?

Best Regards,
Kelvin


INFO:XdmHelpers:851 - TNM "clock", used in period specification "TS_clock",
was
traced into DCM instance "DCM0". The following new TNM groups and period
specifications were generated at the DCM output(s):
CLKFX: TS_clk_36m_tmp_0=PERIOD clk_36m_tmp_0 TS_clock/4.000000 HIGH
50.000000%


IBUFG CLOCK_IN ( .I(clk_40m), .O(clock) );
DCM DCM0 ( .CLKFB(clock_out), .CLKIN(clock),
.DSSEN(low), .PSCLK(low), .PSEN(low), .PSINCDEC(low), .RST(low),
.CLK0(), .CLK90(), .CLK180(), .CLK270(), .CLK2X(clk0),
..CLK2X180(),
.CLKDV(), .CLKFX(clk_36m_tmp), .CLKFX180(), .LOCKED(dcm0_locked),
..PSDONE(), .STATUS() );
BUFG CLK_BUF0( .I(clk0), .O(clock_out) );
//synthesis translate_off
defparam DCM0.DLL_FREQUENCY_MODE = "LOW";
defparam DCM0.DUTY_CYCLE_CORRECTION = "TRUE";
defparam DCM0.STARTUP_WAIT = "TRUE";
defparam DCM0.DFS_FREQUENCY_MODE = "LOW";
defparam DCM0.CLKFX_DIVIDE = 10;
defparam DCM0.CLKFX_MULTIPLY = 9;
defparam DCM0.CLK_FEEDBACK = "2X";
defparam DCM0.CLKOUT_PHASE_SHIFT = "FIXED";
defparam DCM0.PHASE_SHIFT = 0;
//synthesis translate_on


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