Re: HELP on PLL and DCM
chestnut,
PLL is a well known, and well understood building block: filters jitter
(jitter out is the intrinsic jitter of the VCO in the PLL), able to
synthesize a Fout which is some M and some D, Fout=M/D * Fin.
PLL's continue to provide an output when they have no input.
Knowing that a PLL is locked is often difficult, as the PLL is an analog
circuit.
The DCM is a Xilinx invention, which uses matched delay lines to provide
precise phase shift, zero clock insertion delay, multiple precise phase
outputs (90, 180, 270 degree), and some degree of M/D synthesis.
The block is all digital and synchronous, so completely deterministic
behavior. Jitter is not filtered, as the output is just a delayed copy
of the input (jitter is only added). Locked is a state of a state machine.
DCM operates over a much wider range of Fin, Fout than a PLL due to
architecture.
There are some tasks where either may be used.
There are some tasks where one has advantages.
There are very few tasks where one can not be used at all.
Austin
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