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Old 05-28-2009, 09:44 PM
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Default Has ST's FPGA project GOSPL transformed to Morpheus ?

http://techanalysttalks.blogspot.com

In year 2004, ST announced the GOSPL "Generalized Open source
programable logic" with a bang. GOSPL is a standard platform for
programmable logic driven by an open source tool chain, a complete
paradigm shift from the status quo predicted to become the digital DNA
of electronics.
It was touted as the people's chip with a community of developers
woven around it. A lot of universities in the US, Europe and India
participated in the project. ST also organized an international
conference in New Delhi inviting the global EDA, IP, semiconductor
professionals, academia and venture capitalist community from around
the globe. This re-programmable, re-usable, system-on-chip was claimed
to benefit all the entities of the semiconductor value chain.
It was undoubtebly a breakthrough idea for the semiconductor industry
and for FPGA industry in particular. ST contributed few million lines
of code to the project and put it into public domain. The idea was to
bring the competition in the FPGA industry to FPGA silicon instead of
FPGA tools. Xilinx and Altera which have more than 90% of the FPGA
market share between them, have erected high industry barriers based
on their software expertise and silos of software code which is
proprietary to them. Putting the FPGA tool code in the public domain
and asking the developer community to contribute to it was a major
step in challenging the software capablities of Xilinx or Altera.

FPGA industry had always been a tough nut to crack even for industry
leaders like Intel, Motorola, IBM, Lucent. To everyone's surprise,
within a year of the announcement of the project the project was put
on hold.

ST said that it was redeploying approximately 1,000 engineers,
representing 10 percent of STís R&D workforce, from non-core programs,
including FPGA and third-party design services, and from CPE modem and
GSM chipset activities
There was also a speculation that ST may spin off GOSPL in a
management buy out, or sell the operation to an FPGA company.

Interestingly ST has been part of the Morpheus collobarative research.
It has recently compe up with the first prototypes of the Morpheus
chip. Chances are high that ST has transformed GOSPL into Morpheus.
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Old 05-30-2009, 12:46 AM
rickman
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Default Re: Has ST's FPGA project GOSPL transformed to Morpheus ?

On May 28, 3:44*pm, [email protected] wrote:
>
> ST said that it was redeploying approximately 1,000 engineers,
> representing 10 percent of STís R&D workforce, from non-core programs,
> including FPGA and third-party design services, and from CPE modem and
> GSM chipset activities
> There was also a speculation that ST may spin off GOSPL in a
> management buy out, or sell the operation to an FPGA company.


If an existing FPGA company buys the GOSPL project, it will be to bury
it.

> Interestingly ST has been part of the Morpheus collobarative research.
> It has recently compe up with the first prototypes of the Morpheus
> chip. Chances are high that ST has transformed GOSPL into Morpheus.


Morpheus is a lot more than just an FPGA. It includes a
reconfigurable instruction set processor (RISA). Personally, I feel
that is a bit of, "so what". I can almost guarantee that a RISA
processor will get two or three standard configurations because of the
costs associated with designing your own instruction set. Maybe I am
missing something important about this, but I think it would be a
better chip with some sort of minimal instruction set processor
(MISC).

Morpheus is a multi-partner development effort according to the
reports. I can't imagine that this is going to be a rousing success.
There are just too many cooks to spoil the pot.

Rick
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Old 05-30-2009, 09:07 AM
-jg
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Default Re: Has ST's FPGA project GOSPL transformed to Morpheus ?

On May 30, 10:46*am, rickman <[email protected]> wrote:
> Morpheus is a lot more than just an FPGA. *It includes a
> reconfigurable instruction set processor (RISA). *Personally, I feel
> that is a bit of, "so what". *I can almost guarantee that a RISA
> processor will get two or three standard configurations because of the
> costs associated with designing your own instruction set. *


Depends on what RISA really means. It may be market-speak for
features that NIOS offers where (IIRC) you can map SW calls to
FPGA fabric - that makes more sense, than 6 different ways to code
an AND opcode..
-jg
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Old 05-30-2009, 09:21 AM
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Default Re: Has ST's FPGA project GOSPL transformed to Morpheus ?

On 30 May, 10:07, -jg <[email protected]> wrote:
> On May 30, 10:46*am, rickman <[email protected]> wrote:
>
> > Morpheus is a lot more than just an FPGA. *It includes a
> > reconfigurable instruction set processor (RISA). *Personally, I feel
> > that is a bit of, "so what". *I can almost guarantee that a RISA
> > processor will get two or three standard configurations because of the
> > costs associated with designing your own instruction set. *

>
> Depends on what RISA really means. It may be market-speak for
> features that NIOS offers where (IIRC) you can map SW calls to
> FPGA fabric - that makes more sense, than 6 different ways to code
> an AND opcode..
> -jg


folks you refer to that:

http://www.morpheus-ist.org/index.htm

or what?
I do not see any mentioning of RISA there?

Antti
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Old 05-30-2009, 05:45 PM
rickman
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Default Re: Has ST's FPGA project GOSPL transformed to Morpheus ?

On May 30, 3:21*am, "[email protected]"
<[email protected]> wrote:
> On 30 May, 10:07, -jg <[email protected]> wrote:
>
> > On May 30, 10:46*am, rickman <[email protected]> wrote:

>
> > > Morpheus is a lot more than just an FPGA. *It includes a
> > > reconfigurable instruction set processor (RISA). *Personally, I feel
> > > that is a bit of, "so what". *I can almost guarantee that a RISA
> > > processor will get two or three standard configurations because of the
> > > costs associated with designing your own instruction set. *

>
> > Depends on what RISA really means. It may be market-speak for
> > features that NIOS offers where (IIRC) you can map SW calls to
> > FPGA fabric - that makes more sense, than 6 different ways to code
> > an AND opcode..
> > -jg

>
> folks you refer to that:
>
> http://www.morpheus-ist.org/index.htm
>
> or what?
> I do not see any mentioning of RISA there?
>
> Antti


I don't recall where I read about this, it was in some news release on
this event. But you will see it in the diagram on this page.

http://www.morpheus-ist.org/pages/arch.htm

rick
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  #6 (permalink)  
Old 05-30-2009, 05:51 PM
rickman
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Posts: n/a
Default Re: Has ST's FPGA project GOSPL transformed to Morpheus ?

On May 30, 3:21*am, "[email protected]"
<[email protected]> wrote:
> On 30 May, 10:07, -jg <[email protected]> wrote:
>
> > On May 30, 10:46*am, rickman <[email protected]> wrote:

>
> > > Morpheus is a lot more than just an FPGA. *It includes a
> > > reconfigurable instruction set processor (RISA). *Personally, I feel
> > > that is a bit of, "so what". *I can almost guarantee that a RISA
> > > processor will get two or three standard configurations because of the
> > > costs associated with designing your own instruction set. *

>
> > Depends on what RISA really means. It may be market-speak for
> > features that NIOS offers where (IIRC) you can map SW calls to
> > FPGA fabric - that makes more sense, than 6 different ways to code
> > an AND opcode..
> > -jg

>
> folks you refer to that:
>
> http://www.morpheus-ist.org/index.htm
>
> or what?
> I do not see any mentioning of RISA there?
>
> Antti


Here is one link that refers to this term...

http://www.pldesignline.com/products...RSKH0CJUNN2JVN
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