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Old 12-01-2003, 02:49 PM
Vazquez
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Default Functional Simulation QuartusII

Dear Sir or Madame,

I have a question concerning the inputs of a VHDL module when
simulating with the Altera QuartusII Waveform Editor.
The input CONTROL shall be a registered signal from a different
module.
When doing a functional simulation I edit the waveform in that form you
can see so that CONTROL changes its value right with rising edge of
CLK. So I want to reproduce the registered input signal CONTROL.
But when starting the functional simulation I get the error message:
"Found clock-sensitive change during active clock edge ...", of course.
My question: How can I reproduce the clock synchronous input CONTROL without
violating setup-time? (using the Waveform Editor !!!)

Thank you for your help.

Andre V.
G&D System Development


-------- -------- --------
| | | | | |
| | | | | | CLK
| |___________| |___________| |___________


-------------------------------------------
|
| CONTROL
_____________________|
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  #2 (permalink)  
Old 12-02-2003, 12:21 PM
G.Bartelt
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Default Re: Functional Simulation QuartusII

Delay the control signal for some nano seconds

"Vazquez" <[email protected]> schrieb im Newsbeitrag
news:[email protected] om...
> Dear Sir or Madame,
>
> I have a question concerning the inputs of a VHDL module when
> simulating with the Altera QuartusII Waveform Editor.
> The input CONTROL shall be a registered signal from a different
> module.
> When doing a functional simulation I edit the waveform in that form you
> can see so that CONTROL changes its value right with rising edge of
> CLK. So I want to reproduce the registered input signal CONTROL.
> But when starting the functional simulation I get the error message:
> "Found clock-sensitive change during active clock edge ...", of course.
> My question: How can I reproduce the clock synchronous input CONTROL

without
> violating setup-time? (using the Waveform Editor !!!)
>
> Thank you for your help.
>
> Andre V.
> G&D System Development
>
>
> -------- -------- --------
> | | | | | |
> | | | | | | CLK
> | |___________| |___________| |___________
>
>
> -------------------------------------------
> |
> | CONTROL
> _____________________|



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