FPGA Central

Hi All,

I'm doing an internal project for my tiny company and have chosen to use
a Xilinx XC9572 and an Atmel ATMEGA324P along with 6 74LS245
transceivers for this portion.

This project is a board to interface to an ancient (but initially very
expensive) machine, replacing the original interface with a modern one.
The original is all 5V and I don't care about speed, density, power
consumption or cost too much. I'm mostly interested in ease of
implementation and reliability.

Anyway, I bought a Xilinx USB II cable the other day and was looking for
any pointers or tips you may have.

I have both Windows XP SP3 and Ubuntu 8.04 available for development.
I'd prefer to do most or all work under Ubuntu. Is that practical using
the Xilinx toolset?

I am currently working on the schematic/board for the above and plan on
clocking both the CPLD and uP at 20MHz. Any thoughts on the necessity of
using a four-layer board (inner layers power/ground)?

The basic function of the CPLD will be to accept byte-wide writes to one
of 16 possible registers from the "ancient machine" (Intel 8085 @3.0
MHz.) and to store this in the CPLD as a 12 bit value, possibly
double-buffered, then to interrupt the uP. The uP will read and decode
the 12 bit value from the CPLD and store the 8 bit part in RAM. Going in
the other direction the uP will write to a single 8 bit wide register,
possibly double-buffered, in the CPLD which will cause the CPLD to issue
an interrupt to the "ancient machine". Sometime later the "ancient
machine" will read the register in the CPLD and the CPLD will clear the
interrupt line.

Back in '86-'88 I got fairly proficient with 22V10s and ABEL. I haven't
done any programmable logic since then.

Later in this project I'll be using a mid-sized FPGA (probably Spartan
3) to implement some faster and more complex logic (specialized 20 Mbps
data stream organized in scan lines)

Thanks.

gregben <[email protected]> writes:
> I'm doing an internal project for my tiny company and have chosen to
> use a Xilinx XC9572 and an Atmel ATMEGA324P along with 6 74LS245
> transceivers for this portion.
>
> I have both Windows XP SP3 and Ubuntu 8.04 available for
> development. I'd prefer to do most or all work under Ubuntu. Is that
> practical using the Xilinx toolset?

I can do XC9572XL development 100% on Linux (Fedora 6) so you
shouldn't have a problem with that. I don't use the USB cable,
though, I made my own programmer from a spare MCU and the XAPP058
sample program. I can program an XC9572XL in about 12 seconds with
it.

On Jul 14, 12:45 pm, gregben <[email protected]> wrote:
> Hi All,
>
> I'm doing an internal project for my tiny company and have chosen to use
> a Xilinx XC9572 and an Atmel ATMEGA324P along with 6 74LS245
> transceivers for this portion.
>
> This project is a board to interface to an ancient (but initially very
> expensive) machine, replacing the original interface with a modern one.
> The original is all 5V and I don't care about speed, density, power
> consumption or cost too much. I'm mostly interested in ease of
> implementation and reliability.
>
> Anyway, I bought a Xilinx USB II cable the other day and was looking for
> any pointers or tips you may have.
>
> I have both Windows XP SP3 and Ubuntu 8.04 available for development.
> I'd prefer to do most or all work under Ubuntu. Is that practical using
> the Xilinx toolset?
>
> I am currently working on the schematic/board for the above and plan on
> clocking both the CPLD and uP at 20MHz. Any thoughts on the necessity of
> using a four-layer board (inner layers power/ground)?
>

You didn't mention the package you're using for the XC9572, but in any
case 4 layers is probably worth the peace of mind. 2-layer boards
need
very careful attention to ground and power routing, and remember that
even such a venerable part as the XC9572 (not -XL?) still has fairly
fast edge rates and flip-flops fast enough to clock on reflections.

> The basic function of the CPLD will be to accept byte-wide writes to one
> of 16 possible registers from the "ancient machine" (Intel 8085 @3.0
> MHz.) and to store this in the CPLD as a 12 bit value, possibly
> double-buffered, then to interrupt the uP. The uP will read and decode
> the 12 bit value from the CPLD and store the 8 bit part in RAM. Going in
> the other direction the uP will write to a single 8 bit wide register,
> possibly double-buffered, in the CPLD which will cause the CPLD to issue
> an interrupt to the "ancient machine". Sometime later the "ancient
> machine" will read the register in the CPLD and the CPLD will clear the
> interrupt line.
>
> Back in '86-'88 I got fairly proficient with 22V10s and ABEL. I haven't
> done any programmable logic since then.
>

If I'm not mistaken, you can still program the XC9572 in ABEL with
the Xilinx webpack tools, but don't quote me on it. However if you
plan to move to a small FPGA for the next version I would recommend
learning either Verilog or VHDL. The schematic entry tools from
Xilinx are not ready for prime time IMHO.

> Later in this project I'll be using a mid-sized FPGA (probably Spartan
> 3) to implement some faster and more complex logic (specialized 20 Mbps
> data stream organized in scan lines)
>
> Thanks.

At 20 MHz, I would suggest looking at Spartan 2 or Spartan 2e to
save possible headaches with power supplies. The last time I checked
the Spartan 2e was still the cheapest device per user I/O (but not
per fabric LUT or flip-flop). What you lose in the Spartan 2 series
is the DDR I/O flip-flops and DCM (Digital Clock Manager) but they
still
have DLL's (delay-locked loops) if you need something simple like a
clock doubler.

Another cheap source for small to medium FPGA's is the Lattice
ECP2 series. These are more along the lines of Spartan 3
feature-wise.

With a somewhat larger than minimum-size FPGA in the newer series
you should be able to embed a small processor and get rid of
your "ancient" CPU as well.

Regards,
Gabor

On 14 Jul 2008 13:02:02 -0400, DJ Delorie wrote:

>
>
>
>gregben <[email protected]> writes:
>> I'm doing an internal project for my tiny company and have chosen to
>> use a Xilinx XC9572 and an Atmel ATMEGA324P along with 6 74LS245
>> transceivers for this portion.
>>
>> I have both Windows XP SP3 and Ubuntu 8.04 available for
>> development. I'd prefer to do most or all work under Ubuntu. Is that
>> practical using the Xilinx toolset?
>
>I can do XC9572XL development 100% on Linux (Fedora 6) so you
>shouldn't have a problem with that. I don't use the USB cable,
>though, I made my own programmer from a spare MCU and the XAPP058
>sample program. I can program an XC9572XL in about 12 seconds with
>it.
We have used the "Platform USB" cable and the Parallel port CABLE IV from
Xilinx under Redhat EL4 using the impact software. (You need root PW to
install the parallel port drivers and I believe the kernel source installed)

The Digilentinc parallel cable also seems to work with impact under EL4.
This cable comes with the Digilent Coolrunner CPLD development board.
(Remember your PC needs a parallel port for this, many new laptops dropped
the PP)