FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal


Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 01-30-2004, 04:25 PM
Stephen Glow
Posts: n/a
Default Firewire (IEEE 1394a) link layer IP block?

Can anyone recommend a firewire link layer IP block that's
commercially available? Any information on the FPGA resources taken
up by this block would also be appreciated.

Reply With Quote


Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On

Similar Threads
Thread Thread Starter Forum Replies Last Post
A diff on IEEE 1364-2001 & IEEE 1364-2005 standards Jogi Verilog 0 06-13-2006 07:49 PM
ANN: SystemVerilog DPI C Layer Tutorial on Project VeriPage Swapnajit Mittra Verilog 0 03-27-2005 07:14 PM
DPI layer [email protected] Verilog 3 12-17-2004 10:59 PM

All times are GMT +1. The time now is 01:25 AM.

Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved