FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 11-06-2007, 01:50 PM
xenix
Guest
 
Posts: n/a
Default ERROR:MDT - transparent bus interface connector

Hello all,
I am facing the error below when i am doing generate libs and
BSB's.

ERROR:MDT - transparent bus interface connector 'xxx_bram' is only
referenced
once!

any views?

I am using XPS 6.2 version.

regards

Reply With Quote
  #2 (permalink)  
Old 11-06-2007, 04:41 PM
morphiend
Guest
 
Posts: n/a
Default Re: ERROR:MDT - transparent bus interface connector

On Nov 6, 8:50 am, xenix <[email protected]> wrote:
> Hello all,
> I am facing the error below when i am doing generate libs and
> BSB's.
>
> ERROR:MDT - transparent bus interface connector 'xxx_bram' is only
> referenced
> once!
>
> any views?
>
> I am using XPS 6.2 version.
>
> regards


You have a BRAM bus hooked up to only one entity. This bus requires a
Source and Destination. You may have only the BRAM end connected, or
maybe the end only connected to the other side, like a OCM for a PPC
or Microblaze.

-- Mike

Reply With Quote
  #3 (permalink)  
Old 11-07-2007, 11:35 AM
xenix
Guest
 
Posts: n/a
Default Re: ERROR:MDT - transparent bus interface connector

thanx Mike for you answer but i didn't understand it well. can you
explain it more? thanx again

regards

Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Cyclone 3 Starter Board connector? Philipp Klaus Krause FPGA 0 06-01-2007 03:47 PM
connector pons Verilog 1 05-31-2007 07:59 PM
source less connector Shakith FPGA 0 12-03-2004 12:25 AM
p160 connector Henning Bahr FPGA 2 01-05-2004 05:46 PM


All times are GMT +1. The time now is 01:39 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved