On Jun 11, 3:30 pm, Eric Smith <
[email protected]> wrote:
> Brian Davis <[email protected]> writes:
> > Seems like a simple bias network could shift the
> > (DC-balanced) encoding scheme from LVDS to TMDS
> > levels
Yes, but it would not be HDMI or DVI compliant. We do this from the
LVDS outputs on a Virtex4 to a MAX3814 cable equalizer. Simple
capacitive coupling works, because there is a current source (pull up)
in the CML inputs on this chip.
> Can you get TMDS drivers that aren't part of a DVI transmitter chip
> (which also does the encoding)?
As above. Be careful, there are a number of things that won't work.
Most CML stuff we looked at has a pullup in the ouput driver (which is
not compliant with HDMI), instead of the input, which would also
require pullup resistors to bias. Many of the TMDS muxes, are simple
analog muxes, and not CML drivers. Cable equalizers are the only
things that we found a year ago that seemed reasonable choices.
Market may have changed.
> It doesn't appear that DVI transmitter chips cost much, so is it
> really worthwhile to try to avoid using one?
8 IO pins total required on the
FPGA. Ability to embed audio or other
data for HDMI. Complete control over the protocol.
To go from an 8 bit data stream to a differential pair with TMDS
encoding running at the max toggle rate of the
FPGA pins is not a
terribly difficult design to do. Three of these in parallel (with a
very slight difference, depending on which channel it is) makes a
complete interface.
Regards,
Erik.
---
Erik Widding
President
Birger Engineering, Inc.
(mail) 38 Chauncy St #1101; Boston, MA 02111
(voice) 617.695.9233
(fax) 617.695.9234
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http://www.birger.com