FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 10-30-2007, 10:33 PM
Guest
 
Posts: n/a
Default debugging ppc + mb

Hi all,
I would like to debug a system containing a microblze and a ppc405.
I'm
using the xmd (gdb) for both of these units. I have a single mdm unit
and a jtagppc (a single jtag interface).
Is there a way to debug both of the processors simultaneously (via
two
GDBs).
Thanks in advance, Mordehay

Reply With Quote
  #2 (permalink)  
Old 10-30-2007, 11:08 PM
Vasanth Asokan
Guest
 
Posts: n/a
Default Re: debugging ppc + mb


<[email protected]> wrote in message
news:[email protected] ups.com...
> Hi all,
> I would like to debug a system containing a microblze and a ppc405.
> I'm
> using the xmd (gdb) for both of these units. I have a single mdm unit
> and a jtagppc (a single jtag interface).
> Is there a way to debug both of the processors simultaneously (via
> two
> GDBs).
> Thanks in advance, Mordehay
>


Just connect to the two processors in XMD via two separate connect commands.
XMD will open up a GDBServer port for each processor. Connect a GDB session
each to the GDBServer ports. You are all set to debug the two processors
simultaneously.

Be aware of the default system reset performed by XMD upon download of a
program. You can use the debugconfig command to change this behavior, if it
is destructive for your simultaneous debug sessions.



Reply With Quote
  #3 (permalink)  
Old 10-30-2007, 11:17 PM
John Williams
Guest
 
Posts: n/a
Default Re: debugging ppc + mb

Hi,

[email protected] wrote:

> I would like to debug a system containing a microblze and a ppc405.
> I'm
> using the xmd (gdb) for both of these units. I have a single mdm unit
> and a jtagppc (a single jtag interface).
> Is there a way to debug both of the processors simultaneously (via
> two
> GDBs).


You shld be able to do this - using xmd, connect to both CPUs:

% connect mb mdm
% connect ppc hw

you may need to add other options to each connect statement, depending
on your FPGA and JTAG setup etc.

This sequence would make the MB target 0, and the PPC target 1

xmd should then be listening on two different ports, one for the mb, and
one for the ppc.

Since xmd tends to allocate ports from 1234 upwards, my guess is that
the mb will be on port 1234, and the ppc on port 1235 - the actual port
no's will be printed by xmd after each connection is made.

Then, start each gdb, issue a target command

target remote localhost:1234 (for microblaze)

and

target remote localhost:1235 (for the ppc).

Some minor details may remain for you to work out, but this is an
overview of the process

Regards,

John
Reply With Quote
  #4 (permalink)  
Old 11-02-2007, 12:01 AM
Guest
 
Posts: n/a
Default Re: debugging ppc + mb

On Oct 31, 12:17 am, John Williams <[email protected]> wrote:
> Hi,
>
> [email protected] wrote:
> > I would like to debug a system containing a microblze and a ppc405.
> > I'm
> > using the xmd (gdb) for both of these units. I have a single mdm unit
> > and a jtagppc (a single jtag interface).
> > Is there a way to debug both of the processors simultaneously (via
> > two
> > GDBs).

>
> You shld be able to do this - using xmd, connect to both CPUs:
>
> % connect mb mdm
> % connect ppc hw
>
> you may need to add other options to each connect statement, depending
> on your FPGA and JTAG setup etc.
>
> This sequence would make the MB target 0, and the PPC target 1
>
> xmd should then be listening on two different ports, one for the mb, and
> one for the ppc.
>
> Since xmd tends to allocate ports from 1234 upwards, my guess is that
> the mb will be on port 1234, and the ppc on port 1235 - the actual port
> no's will be printed by xmd after each connection is made.
>
> Then, start each gdb, issue a target command
>
> target remote localhost:1234 (for microblaze)
>
> and
>
> target remote localhost:1235 (for the ppc).
>
> Some minor details may remain for you to work out, but this is an
> overview of the process
>
> Regards,
>
> John


Hi John,
Thanks for your detailed answer.
Another little thing - can the mdm & jtagppc live together ? how does
the jtag chain looks like ?
Thanks again, Mordehay.

Reply With Quote
  #5 (permalink)  
Old 11-09-2007, 12:21 AM
John Williams
Guest
 
Posts: n/a
Default Re: debugging ppc + mb

Hi Mordehay,

[email protected] wrote:

>>>I would like to debug a system containing a microblze and a ppc405.
>>>I'm
>>>using the xmd (gdb) for both of these units. I have a single mdm unit
>>>and a jtagppc (a single jtag interface).
>>>Is there a way to debug both of the processors simultaneously (via
>>>two
>>>GDBs).

>>
>>You shld be able to do this - using xmd, connect to both CPUs:
>>
>>% connect mb mdm
>>% connect ppc hw
>>
>>you may need to add other options to each connect statement, depending
>>on your FPGA and JTAG setup etc.
>>


> Another little thing - can the mdm & jtagppc live together ?


Yes, I believe so.

> how does
> the jtag chain looks like ?


MDM connects to the user1 port on the FPGA's JTAG chain, while the
JTAGPPC should insert the PPC as its own device in the chain. I'm not
certain of the exact order, but xmd should take care of that detail.

Regards,

John
Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Debugging in EDK kislo FPGA 2 07-09-2007 11:34 AM
better ways for debugging? CMOS FPGA 8 01-04-2007 06:01 PM
for debugging [email protected] FPGA 1 03-07-2005 06:35 PM
Nios II debugging with gdb David Brown FPGA 6 08-20-2004 01:46 PM
debugging microblaze with xmd Frank FPGA 2 12-04-2003 08:51 AM


All times are GMT +1. The time now is 04:48 PM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved