FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 05-04-2006, 01:09 PM
Guest
 
Posts: n/a
Default CPU resource type

What kind of cpu resources does fpga "compilation" (Analyse, Synthesis, etc..)
use on a cpu..?

Integer/Branch/Bitshifting..?
Floating point..?
Will a pipeline cpu greatly improve speed..?

Reply With Quote
  #2 (permalink)  
Old 05-04-2006, 05:29 PM
Alan Nishioka
Guest
 
Posts: n/a
Default Re: CPU resource type

[email protected]d wrote:
> What kind of cpu resources does fpga "compilation" (Analyse, Synthesis, etc..)
> use on a cpu..?


I always assumed it was sorting and searching types of operations.
But I have no references to back that up.


> Integer/Branch/Bitshifting..?
> Floating point..?
> Will a pipeline cpu greatly improve speed..?


Perhaps faster memory or a larger cache would help.
Aren't all processors pipelined nowadays?

Alan Nishioka

Reply With Quote
  #3 (permalink)  
Old 05-04-2006, 05:59 PM
Guest
 
Posts: n/a
Default Re: CPU resource type

Alan Nishioka <[email protected]> wrote:
>[email protected] wrote:
>> What kind of cpu resources does fpga "compilation" (Analyse, Synthesis, etc..)
>> use on a cpu..?


>I always assumed it was sorting and searching types of operations.
>But I have no references to back that up.


Sounds resonable. The tough task must be to figure out optimal placement of
"gates" and how to route switches. And when to relocate and let signals
through chained switches (kind of like leased lines in telecomm).

Maybe the task is very much similar to BGP (Border Gate Protocoll) in terms
of algorithms.

>> Integer/Branch/Bitshifting..?
>> Floating point..?
>> Will a pipeline cpu greatly improve speed..?


>Perhaps faster memory or a larger cache would help.
>Aren't all processors pipelined nowadays?


Proberbly. But if the app is benefitting a lot from pipelineing. Then it
might pay to use a cpu with extra long pipeline.

Reply With Quote
  #4 (permalink)  
Old 05-04-2006, 07:52 PM
Jon Elson
Guest
 
Posts: n/a
Default Re: CPU resource type



[email protected]d wrote:

>What kind of cpu resources does fpga "compilation" (Analyse, Synthesis, etc..)
>use on a cpu..?
>
>Integer/Branch/Bitshifting..?
>Floating point..?
>Will a pipeline cpu greatly improve speed..?
>
>
>

I'm sure there's no floating point, except to report % usages at the end.
Pipelining always helps, but anything newer than a 286 has at least some
level of pipelining. Plenty of main memory and cache will help greatly.
Swapping to disk will kill this type of large database sorting task.

Jon

Reply With Quote
  #5 (permalink)  
Old 05-07-2006, 01:17 AM
Isaac Bosompem
Guest
 
Posts: n/a
Default Re: CPU resource type


[email protected]d wrote:
> What kind of cpu resources does fpga "compilation" (Analyse, Synthesis, etc..)
> use on a cpu..?
>
> Integer/Branch/Bitshifting..?
> Floating point..?
> Will a pipeline cpu greatly improve speed..?


I have found that cache size and FSB speed/size to be more of a
determining factor of the compilation speed than clock speed.

I would image this is because the data structures formed would get
pretty large (and wouldneed to be frequently accessed).

-Isaac

Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
ROM resource sharing mikel FPGA 3 04-10-2006 10:22 PM
a professional bus community and resource [email protected] Verilog 0 03-09-2006 01:05 PM
a professional bus community and resource [email protected] FPGA 0 03-09-2006 01:04 PM
FPGA behaviour when its used resource is >90% ? [email protected] FPGA 8 10-10-2005 08:55 AM
DSP & FPGA Resource Guide Patrick Hopper FPGA 0 08-27-2004 02:00 PM


All times are GMT +1. The time now is 06:19 PM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved